PCMIA interface card for coupling input devices such as barcode scanning engines to personal digital assistants and palmtop computers

ABSTRACT

A variety of PC card interfaces to interface from many different types of input devices to Personal Digital Assistants or palmtop computers through PCMCIA slots. The disclosed interfaces can receive data in undecoded format from laser based, wand based or CCD based barcode scanning engines, decode the data to alphanumeric characters and pass the decoded data to the PDA via the PCMCIA 68 pin bus. Other PC card based interfaces are also disclosed which can accept input data in the form of ASCII or EBCDIC characters from virtually any type of input device which a standard serial or parallel output or custom output bus and input that data to the PDA through the PCMCIA bus. Some embodiments use programmed general purpose microprocessors to decode undecoded barcode scan data on the PC card. Other embodiments use custom-programmed, commercially available barcode decoding chips to decode incoming undecoded barcode scan data. Some embodiments of PC card interfaces sample undecoded barcode scan signals and pass the samples to the host through the PCMCIA bus for decoding by a suitably programmed host computer.

RELATED APPLICATIONS

[0001] This is a continuation of U.S. patent application Ser. No.09/526,710, filed Mar. 15, 2000 (now allowed), which was a divisional ofU.S. patent application Ser. No. 08/428,692, filed Apr. 25,1995, nowU.S. Pat. No. 5,671,374 issued Sep. 23, 1997, which was acontinuation-in-part of U.S. patent application Ser. No. 08/236,630,filed Apr. 29, 1994, now U.S. Pat. No. 5,664,231 issued Sep. 2, 1997.

COPYRIGHT NOTICE

[0002] A portion of the disclosure of this patent document containsmaterial which is subject to copyright protection. The copyright ownerhas no objection to the facsimile reproduction by anyone of the patentdocument or the patent disclosure, as it appears in the Patent andTrademark Office patent file or records, but otherwise reserves allcopyright rights whatsoever. 37 CFR § 1.71 (d).

COMPUTER PROGRAM LISTING APPENDIX

[0003] This application includes a computer program listing appendix ona single compact disc, the contents of which are herein incorporated byreference. The compact disc contains four files; a 5.73 kb file entitled09-526710-1, a 9.05 kb file entitled 09-526710-2, a 22.8 kb fileentitled 09-526710-3, and a 3.47 kb file entitled 09-526710-4, eachcreated on Aug. 6, 2002.

BACKGROUND OF THE INVENTION

[0004] The invention pertains to the field of input devices for handheldcomputers in general, and to PCMCIA defined PC card interfaces betweenbarcode scanning devices and other input devices and portable computersin particular.

[0005] Portable barcode scanning systems are useful for manyapplications such as inventory control. Portable barcode scanningsystems exist in the prior art and are commercially available from suchvendors as Symbol Technologies, Inc. of Bohemia, N.Y. and Telxon. Todate however portable barcode scanners have been custom units ofproprietary design. An example of a custom designed, proprietaryportable barcode scanning system is the model PTC-600 available fromTelxon. This device uses a custom designed portable computer to which isattached a clip-on barcode scanning engine. This technology is describedin more detail in U.S. Pat. No. 4,621,189, the teachings of which areincorporated by reference. However the process of decoding barcodes iswell known and can be done by any suitably programmed computer havingappropriate interface circuitry so there is no need to buy a customdesigned computer system simply to do one type of task when a generalpurpose computer with suitable peripheral circuitry and software can dothe same task as well as other tasks. Further, there is a disadvantageto the consumer in that as better barcode scanning engines or bettercomputers become available, the consumer is precluded from using them ina custom designed system unless he or she is willing to give up theirinvestment in the custom designed system already purchased.

[0006] With the introduction of palmtop computers, PersonalCommunicators such as the AT&T EO and Personal Digital Assistants(hereafter PDA's) there has arisen a need to modify these generalpurpose devices for use with various input devices such as barcodescanning engines to create “open system” non-proprietary portablebarcode scanning apparatus.

[0007] Therefore, there is described herein an open system interface forvarious input devices such as bar code scanners, magnetic stripe readersetc. which can be integrated onto a PCMCIA defined PC card.

SUMMARY OF THE INVENTION

[0008] The teachings of the invention contemplate a genus of interfacesfor portable laser-scanning, charge coupled device and wand type barcodescanning engines, magnetic stripe and magnetic ink readers, keyboards or10-key keypads, optical character recognition devices, and trackballsusing PCMCIA defined PC cards to interface these devices with host PDA'sor palmtop computers.

[0009] The advantages of implementing interfaces for frequently usedinput devices on industry standard PC cards are plentiful. First andforemost is the fact that such an “open system” combination gives theuser the advantage of not being locked into a proprietary technologythat can become obsolete in a matter of months in the fast moving worldof high tech electronics. What this means to a user is that when abetter PDA or palmtop computer comes out, the user does not have to buyall new input devices designed specifically to work only with thatcomputer as long as the new computer has an industry standard PC cardslot. Thus, if the manufacturer of the new computer does not offer aproprietary CCD or laser based barcode scanner, the user is notprecluded from using such an input device as long as the new computerhas a PC card slot. Likewise, when a new input device with betterfeatures appears on the market, the user is not precluded from switchingto the new input device for use with his or her existing PDA so long ashe or she has a PC card implementing an appropriate interface for thenew input device to convert the output of the new input device tosignals on 68 pin bus defined by PCMCIA standards accepted industrywide.

[0010] In one embodiment of the interface for a laser type barcodescanning engine, the PCMCIA defined PC card has attached thereto ahousing which contains a visible light laser diode, scanning optics anda photodetector. The scanning optics scan a laser beam across a barcodeand detect reflected light. In some embodiments, the PCMCIA defined PCcard has circuitry integrated thereon to sample the analog signal fromthe photodetector and create a digital image thereof in memory anddecode the digital image in memory into an ASCII or EBCDIC characterstring representing the alphanumeric text encoded into the barcode(ASCII or EBCDIC are industry standard codes that define for eachalphanumeric character a unique string of 1's and 0's that are a binarycode for that character). In addition there is circuitry integrated onthe PCMCIA defined PC card to send the decoded data from thephotodetector to the host PDA for use by an application program inexecution thereon.

[0011] In some embodiments, the PC card interface contains circuitry tosample TTL level or wand type signals from an input device and send thesample data to a host computer through the PCMCIA slot. The hostcomputer then decodes alphanumeric characters from the sample data.

[0012] In other embodiments, the PC card interface contains circuitry tomake the TTL level or wand type signal available on a pin of the PCMCIAbus where the host periodically samples the voltage level on the pin andcreates a sample buffer. The alphanumeric characters encoded in thesamples are then decoded by the host computer.

[0013] In one embodiment, the signal from an undecoded barcode scanengine or other input device that outputs electrical signals that encodealphanumeric characters is coupled to a specially programmed decoderchip on the PC card. The barcode scan engine or other input device iseither external to the PC card or physically mounted thereon. Thedecoder chip decodes the electrical signals into alphanumeric charactersand generates an interrupt to the host computer through a pin on thePCMCIA bus. The host computer then does an I/O transaction to the PCcard to retrieve the decoded data. In one particularly useful species ofthis genus, the PC card includes nonvolatile memory which may beaccessed by the host computer through the PCMCIA bus without blockingaccess to the decoder through the PCMCIA bus. In this way, hostcomputers that are memory limited like PDA's may replace their PC memorycard with a barcode decoder PC card having on-board nonvolatile memoryand have the benefit of both PC card barcode decoding (or access to datafrom other types of input devices) while not losing the benefit of alsohave external nonvolatile memory which may be used for any purpose.

[0014] Additional aspects and advantages of this invention will beapparent from the following detailed description of preferredembodiments, which proceeds with reference to the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

[0015]FIG. 1 is a diagram of a PC card with integrated laser basedbarcode scanning engine.

[0016]FIG. 2 is a cross-sectional diagram of a typical laser diode basedbarcode scanning engine that can be integrated within a housing affixedpermanently or by clip-on connection to a PC card.

[0017]FIG. 3 is a block diagram of one embodiment of a PC card interfacecircuit for interfacing to an input device such as laser based barcodescanning engine which outputs undecoded binary data.

[0018]FIG. 4 is a memory map of the three memory zones of the PC cardinterfaces disclosed herein.

[0019]FIG. 5 is a diagram of the software architecture within the PDAwhich supports the PC card.

[0020]FIGS. 6A, 6B and 6C are a flow chart of the processing performedon a PC card interface according to the teachings of the invention whichsamples and stores undecoded HHLC data and decodes it and sends thedecoded alphanumeric characters to the PDA.

[0021]FIG. 7 is a flow chart of the processing which occurs in the PDAto support the PC card interface to an input device such as a barcodescanning engine.

[0022]FIG. 8 is an alternative circuit for a PC card interface circuitusing one RAM devoted to the process of gathering data from the inputdevice and another RAM in the Common Memory Space for storing data to betransferred to the PDA.

[0023]FIG. 9 is a diagram of a PC card interface with integrated wandtype barcode reader.

[0024]FIG. 10 is a flow chart of the software process executed by the PCcard to decode undecoded serial data from a wand type barcode reader “onthe fly”.

[0025]FIG. 11 is a flow chart of the software process executed by the PCcard to decode undecoded serial data from a wand type barcode reader “onthe fly” without counting transitions.

[0026]FIG. 12 is a block diagram of a PC card interface for coupling toany type of input device which outputs serial or parallel format data orhas TTL/MOS, CMOS or ECL logic level data.

[0027]FIG. 13 shows a PC card for any input device which outputs data inHHLC, TTL undecoded, serial RS232 etc., parallel or custom format whichis tethered to the PC card by a cable.

[0028]FIG. 14 depicts a PC card interface for a CCD barcode readingengine.

[0029]FIG. 15 represents a PC card interface for a magnetic stripereader.

[0030]FIG. 16 represents a PC card interface for a magnetic ink reader.

[0031]FIG. 17 represents a PC card interface for an Optical CharacterRecognition input device.

[0032]FIG. 18 represents a PC card interface for a trackball.

[0033]FIG. 19 represents a PC card interface for a keyboard or 10-keykeypad.

[0034]FIGS. 20A and 20B are a flowchart for the processing that occurson the PC card to receive serial format decoded data from an RS232 etc.output from an input device and transfer it to a PDA.

[0035]FIG. 21 is a flowchart of the processing on a PC card thatreceives parallel format decoded output from an input device andtransfers it to the PDA.

[0036]FIG. 22 is a block diagram of an embodiment of a PC card which candecode undecoded barcode scan data from a barcode scan engine which canbe either integrated on the PC card or tethered to it by a cable, andwhich uses only a decoder chip and auxiliary memory and which inputsdecoded alphanumeric characters to the host through a PCMCIA slot. Thedecoded data is also stored in the auxiliary memory of the PC card bythe decoder circuitry thereof in some embodiments.

[0037]FIG. 23 is a block diagram of the invention that uses a serialport PC card to import undecoded barcode scan engine data into the hostthrough a PCMCIA slot for decoding on the host.

[0038]FIG. 24 is a block diagram of another embodiment of the invention,wherein a PC card with a PCMCIA adapter chip receives undecoded datafrom a barcode scan engine and inputs the undecoded data into a host fordecoding by the microprocessor of the host.

[0039]FIG. 25 is a block diagram of a favored embodiment of a PC cardwith a decoder chip and a PCMCIA interface chip which receives undecodedbarcode scan data from an integral or tethered barcode scan engine,decodes the data and sends it to a host computer through a PCMCIA slotand which provides auxiliary nonvolatile memory to the host computer.

[0040]FIG. 26 is a block diagram of a PC card with all the features ofthe embodiment of FIG. 25 plus a UART which can receive serial decodeddata from any input device which outputs serial format alphanumericcharacters and which can input the received alphanumeric characters intoa host through the PCMCIA slot.

[0041]FIG. 27 is a flowchart of a typical process that occurs inscanning barcode data using a host computer having a PCMCIA slot with aPC card having the architecture of either FIG. 25 or FIG. 26.

[0042]FIG. 28 represents a class of embodiments which are modificationsof the embodiments symbolized by FIG. 27 wherein the decoded data from acomplete session of barcode scanning of one or more barcodes is storedin the nonvolatile memory on the PC card before an interrupt isgenerated to the host computer, i.e., an interrupt is not generated foreach successful decoding operation.

[0043]FIG. 29, comprised of FIGS. 29A through 29C, is a flow chart ofthe process that allows the barcode driver to retrieve decoded barcodedata from registers on the barcode card using I/O cycles withoutdestroying the ability of other client applications to access thenonvolatile memory on the barcode card.

[0044]FIG. 30 is a flowchart of an exemplary process of mapping theregisters of the barcode card into the I/O space of the host andassigning an interrupt number to the barcode card which occurs each timethe barcode card is removed and re-inserted into the host PCMCIA socket.

[0045]FIG. 31 is a flowchart of one embodiment of the process that goeson in the host and PC card when a client application writes data to anonvolatile memory on the barcode PC card.

[0046]FIG. 32 is a flowchart of the processing carried out by analternative embodiment of a barcode client routine executed on the hostcomputer for interfacing the host to the barcode card using a terminateand stay resident routine or driver for receiving interrupts.

[0047]FIG. 33 is a block diagram of the flow of the program thatprograms the GAL logic configuration for a gate array logic controllerin the hardware embodiment shown in FIG. 36.

[0048]FIG. 34 shows a detailed flowchart of an interrupt service routinewhich may be part of or which cooperates with a barcode client forreceiving data from a barcode card and stores it in a keyboard buffer.

[0049]FIG. 35, comprised of FIGS. 35A and 35B, is a flowchart for analternative barcode client application for interfacing a host to abarcode card in the PCMCIA form factor using a polled architecture andnot utilizing the custom memory technology driver layer describedearlier herein.

[0050]FIG. 36 is a block diagram of one broad embodiment of theinvention wherein a decoder on a PC card decodes undecoded barcode scansignals into alphanumeric characters and cooperates with the host to getthese alphanumeric characters into the host's memory or keyboard buffer.

[0051]FIG. 37 is a block diagram of a system including a host computerwhich does decoding on-board the host and a PC card which only passesdigitized samples of the barcode pattern to the host for decoding.

[0052]FIG. 38 is a block diagram for one embodiment of the sampling andPCMCIA interface circuit 800 in FIG. 37 using an interrupt drivenarchitecture.

[0053]FIG. 39 is a block diagram of a polled type architecture forsampling and PCMCIA interface adapter circuit 800 in FIG. 37.

[0054]FIG. 40 is another embodiment of sampling and PCMCIA interfaceadapter circuit 800 in FIG. 37 using a timer type arrangement togenerate compress the sample data.

[0055]FIG. 41 is a block diagram of the preferred circuit for a PCMCIAbarcode decoder card that feeds decoded alphanumeric data to the hostcomputer and which has on-board nonvolatile flash EEPROM available foruse by the host.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

[0056] Referring to FIG. 1, there is shown a diagram of the one speciesof a portable laser-based barcode scanner peripheral with a PCMCIA PCcard interface within with the genus of the invention. The peripheralcomprises a PCMCIA defined PC card 10 which has integrated thereon aninterface circuit for a portable laser based barcode scanning enginemounted within a housing 13 which is permanently affixed to the PC card.PC cards are small removable peripheral devices for portable computerswhich are roughly the size of a credit card (2.126″×3.37″) but have;different thicknesses. A type I card has a thickness of approximately3.3 millimeters (mm) while Type II and Type III cards have thicknessesof 5 mm and 10.5 mm, respectively. The PCMCIA “PC card” standardsincorporated by reference herein cover physical dimensions, pinassignments, electrical specifications, protocols and file formats. PCcards interface with 8 and 16 bit buses and support physical access toup to 64 megabytes of memory. The interface circuit on the PC card canbe designed in any one of many different ways, and the generalprinciples of interfacing to microcomputers are known. Many very goodpublications exist in this area, one of which is “MicrocomputerInterfacing” by Bruce Artwick (Prentice Hall, Englewood Cliffs, N.J.)1980 ISBN 0-13-580902-9 which is hereby incorporated by reference.

[0057] PC card 10, and all the other PC cards in other embodimentsdisclosed herein, is compatible with PCMCIA PC card Standards includingPC card Standard Release 2.01, Socket Services Specification Release2.0, Card Services Specification Release 2.0, ATA Specification Release1.01, AIMS Specification Release 1.0 and the Recommended ExtensionsRelease 1.0, all of which are incorporated by reference herein.

[0058] Incorporating an interface for any input device, and especially abarcode scanning engine on a PC card for a PDA such as the AppleNewton(tm) using open systems standards has several advantages. First,such a portable barcode scanning system can be less expensive since thegeneral purpose devices are mass produced such that economies of scaleand other price erosion factors such as rapid obsolescence apply to holdthe price down and to lower the price over time. Second, it is possiblewith an open system interface to avoid locking customers into aparticular vendor or into a particular technology which rapidly becomesobsolete in the fast paced world of high technology electronics. If thebarcode scanner interface or interface for other input device such as amagnetic strip reader etc. is integrated into a PCMCIA defined PC cardsuch that the input device can communicate with the host PDA/palmtop viaan industry standard PCMCIA bus, the user may simply slip the PCMCIAdefined PC card interface into another palmtop or PDA when a newgeneration input device or PDA becomes available. This same conceptmeans rapid turnaround time for maintenance in case of failure of theinput device or PDA.

[0059] Returning to the discussion of PCMCIA based barcode scanningengine, the barcode scanning engine input device uses a visible light orinfrared laser diode 14 to generate a beam of visible, coherent light 16which is coupled to the input of known scanning optics 18. If aninfrared laser diode is used, a spotter beam or light source that iscomprised of visible light and which is directed by the same scanningoptics used by the laser is usually used. The purpose of the scanningoptic system 18 is to receive the light beam 16 and to focus the beamdown to a small spot size and to scan the output beam across a barcode22 located at a reference plane which is anywhere from less than an inchto several feet away from the laser scanning engine. The scanning optics18 should focus the output beam 20 down to a spot size at the referenceplane where barcode 22 exists which is small enough to resolve the lightand dark patterns of barcode 22. An acceptable spot size at thereference plane would be approximately 6-12 mils across.

[0060] Further, the scanning optics might and usually does scan theoutput beam 20 through a range of movement at the focal plan which islarge enough to span any barcode to be scanned. Typically, barcodes areless than two inches across, although in some applications, they can bewider. The scanning optics 18 should cause the output beam 20 to befocussed at a focal plane which far enough away from the scanner to givethe scanner a useful range such that barcodes can be scanned at adistance without having the scanner in physical contact with thebarcode. Generally, this range is from about two inches up to about twofeet although longer ranges are desirable in some applications. Further,the scanning optics 18 should focus the output beam at the referenceplane such that the output beam has a sufficiently large depth of fieldthat the barcode does not have to be located exactly at the focal planeto be decoded. Generally, the depth of field, should be made as large aspossible, and an acceptable depth of field would be about from one totwenty inches on either side of the focal plane with a focal planelocated about three to four inches away from the scanner.

[0061] A suitable optical system 18 to focus a output beam from a laserdiode is disclosed in U.S. Pat. No. 5,021,641 which is herebyincorporated by reference as one of many possible embodiments for thelaser scanning engine within housing 13. In one embodiment of the inputdevice structure shown in FIG. 2, a visible laser diode is substitutedfor the invisible light laser diode of U.S. Pat. No. 5,021,641 and thevisible light source and 3-state trigger of that patent are eliminated.A software trigger to be described below or no trigger mechanism at allis substituted. The optical system taught in U.S. Pat. No. 5,021,641uses an aperture stop which is circular and approximately 1.2millimeters in diameter to cut down the cross section of the output beamfrom the laser diode to acceptable limits. This aperture stop is locatedfrom about 9.7 millimeters to 9.2 millimeters away from the emitter ofthe laser diode.

[0062] The system disclosed in U.S. Pat. No. 5,021,641 utilizes a laserdiode which does not emit visible light. This is inconvenient to userswho must aim the scanning beam such that it traverses the barcode butwho do not know the path the beam is travelling because of its invisiblenature. Therefore, to improve the user interface, the optical systemtaught in U.S. Pat. No. 5,021,641 includes a trigger activated visiblelight aiming system and a movable scanning mirror.

[0063] Reflected light from the barcode being scanned, represented byvector 21 is detected by photodiode 24 and an analog signal is generatedfor decoding by interface circuitry on the PC card 10. The PC card 10slips into either a type II, or III PCMCIA slot of a personal digitalassistant (PDA) or palmtop computer 26 which hereafter will be referredto as the portable host or the host.

[0064] The portable host 26 has a CPU and associated control program(not separately shown), a display 27 and possibly a keyboard. In oneembodiment, the PDA is an Apple Newton Model 110 with a pen baseddisplay user input system. The CPU and associated control program of theportable host can do the decoding of the barcode in some embodimentssuch as the embodiments shown in FIGS. 23 and 24, but in the preferredembodiment, the decoding is done by a microprocessor on the PC cardinterface circuit 10. Decoding of the barcode by the PDA CPU is done byreading digital data representing a “digitized image” of the barcodepattern from a memory in the PC card 10 and analyzing the ratios betweenthe lengths of the various light and dark spaces. The “digitized image”as that phrase is used herein for one dimensional barcodes means astring of logical 1's and 0's stored in sequential memory locationswhich encode the transition between light and dark and the relativespacing between these transitions as opposed to actual analog-to-digitalconversion of the analog values of a video signal at a plurality ofpixels.

[0065] Referring to FIG. 2, there is shown a drawing of one embodimentfor a visible light laser diode barcode scanning engine which can beembodied within housing 13. Although the particular details of theconstruction and arrangement of the laser barcode scanning engine arenot critical to the invention, the arrangement of FIG. 2 is onestructure that is contemplated to be within the teachings of theinvention. A semiconductor visible light laser diode 14 emits a coherentlight beam when scanning of a barcode starts. The light beam is focussedby a lens 18A and passes through a partially silvered mirror 18B. Thelight beam generated by the laser diode exits the partially silveredmirror and impinges upon a scanning mirror 18C which is driven in anoscillatory pattern by a scanning motor 18D. The scanning motor 18D maybe a stepper motor, a piezoelectric motor, one or more bimorphs, a D.C.motor, one or more solenoids, a mylar film resonant motor or any othersource of motive power which can oscillate the mirror 18C at the desiredscan rate. The scan rate can be any desired rate, but generally 200scans per second is typical. The resultant scanning laser beam 20 exitsa light-transmissive window 27 and scans repeatedly across a barcodesymbol 22 located at a reference plane 23. Reflected light, symbolizedby arrow 21 re-enters housing 28 through light-transmissive window 27and impinges upon scanning mirror 18C where it is reflected towardpartially silvered mirror 18B. A portion of the reflected light isdeflected into the input aperture of photodiode 24 where the intensityof the reflected light over time is converted into an analog signalcalled HHLC. This conversion is done by comparator 29 which receives theraw analog signal from the photodiode on line 27 and compares thevoltage thereof to a reference voltage on line 25. The reference voltageis set at a level such that if the analog voltage on line 27 is higherthan the reference voltage, the reflected light which generated thatvoltage level on line 27 was, in all probability, light from a whitespace portion of the barcode being scanned. If the analog voltage online 27 is lower than the reference voltage, it is likely that thereflected light was from a dark portion of the barcode. The comparator29 outputs a TTL level signal which switches states from logic 1 tologic 0 each time the voltage level on line 27 drops below the referencevoltage level and which transitions from logic 0 to logic 1 each timethe voltage on line 27 rises above the level of the reference voltage.

[0066] More detail about the structure depicted in FIG. 2, the structureof the scanning motor and the shock resistance thereof, can be gleanedfrom study of U.S. Pat. No. 5,198,651 which is hereby incorporated byreference. Details of other laser scanning engines which are exemplaryof the types of laser scanning engines which may be incorporated withinhousing 28 are given in U.S. Pat. No. 4,387,297, U.S. Pat. No.4,760,248, U.S. Pat. No. 4,409,470, and U.S. Pat. No. 4,652,750, all ofwhich are hereby incorporated by reference.

[0067] In some species within the scope of the genus of the invention,circuitry will be included within housing 28 to decode the HHLC signaloutput from the laser scanning engine within housing 28 and output theASCII or EBCDIC alphanumeric characters to interface circuitry on the PCcard. The PC card interface then buffers these characters in memory andgenerates an interrupt to the portable host alerting the host thatdecoded barcode characters are available in the memory of the PC card tobe read. The nature of this decoding circuitry and the interfacecircuitry will be apparent to those skilled in the art from a study ofthe interface circuitry of FIG. 3 which describes the interfacecircuitry which performs these same functions on the PC card.

[0068] Referring to FIG. 3, there is shown a block diagram of oneembodiment of the interface circuitry within PC card 10 for anembodiment where the output of the laser scanning engine is not decodedwhen it arrives at the PC card and is decoded by circuitry on the PCcard. The undecoded HHLC signal from the photodiode 24 arrives on line30. Vcc power and signal ground are supplied to the input devicecomponents within housing 28 from the PC card via lines 32 and 34. Theundecoded signal on line 30 is buffered and level shifted if necessaryby amplifier 36 to condition the signal for sampling by microprocessor38. The microprocessor executes a decoding program encoded in read onlymemory 40. ROM 40 may also be EPROM, and, preferably, is Intel FlashEPROM. The details of the decoding program are given in the flow chartof FIGS. 6A through 6C, which will be described further below. Undercontrol of the decoding program, the microprocessor 38 samples the HHLCdata on line 42 from the output of the buffer 36. Typically, themicroprocessor 38 is any of a number of different microprocessors.

[0069] The signal on line will be essentially a binary representation ofthe barcode being scanned in that it will be logic 1 for times when thelaser beam is impinging upon and reflecting from white spaces and logic0 when the laser beam is impinging upon and reflecting from darkportions of the barcode (or vice versa). The amount of time the signalon line 42 is logic 1 and logic 0 is determined by the pattern of thebarcode and the speed of scanning. However the alphanumeric informationencoded within the barcode is usually encoded by the ratios of light todark spaces, so the relative times that the signal on line 42 is logic 1and logic 0 is what is important.

[0070] The signal on line 42 is sampled at one pin of a parallel port44. Other pins of this parallel port are coupled to various handshakinglines on bus 46. This handshake bus is coupled to the 68 pin edgeconnector PCMCIA defined PC card bus/interface 48 hereafter referred toas the PCMCIA Bus 48. In the presently considered embodiment, thedecoded alphanumeric data from the barcode will be passed to the PDA byplacing the alphanumeric data in random access memory 50 (hereafter RAM)and notifying the PDA to retrieve the data from the RAM 50. RAM 50 iscoupled to a shared address bus 52 and a shared data bus 50, both ofwhich are coupled to the microprocessor 38 address and data ports,respectively, and the address and data lines of the PCMCIA Bus 48. RAM50 is memory mapped in the Common Memory address space shared by boththe PDA 26 and the microprocessor 38. This Common Memory address spaceis defined by the PCMCIA standards that have been incorporated byreference herein. The signals on the handshake bus 46 are used tocontrol whether the microprocessor 38 or the PDA has control of theshared address bus 52 and the data bus 54 coupled to the RAM 50 at anyparticular time so as to prevent bus conflicts. No bus arbitration isnecessary in most embodiments, although a separate bus arbitration chipis within the genus of the invention for alternative embodiments.

[0071] One manner of using the handshaking signals on the handshake busis for the microprocessor 38 to assert a Ready/Busy signal on bus 46when microprocessor 38 is busy writing decoded data to the RAM 50 anddoes not want to be interrupted. This restricts the PDA's access to thePC card until microprocessor 38 is finished writing a decoded message toRAM 50. Decoded alphanumeric data is written to RAM 50 by microprocessor38 by using address port 56 to output on address bus 52 the address ofthe storage location in RAM 50 with a decoded alphanumeric character tobe written or programmed. To select RAM 50 and control the read/writemode thereof, the microprocessor 38 writes appropriate control signalson control bus 60 via control port 62 to address decoding circuitry 61.The address decoder 61 receives the read/write control signals oncontrol bus 60 and the address from address bus 52, determines that theaddress is in the address space occupied by RAM 50 and activates chipselect and read/write control signals on bus 64 to select RAM 50 andplace it in write mode. The data to be written is placed on data bus 50via data port 58 and will then be placed by RAM 50 into the desiredstorage location.

[0072] A complete message as that term is used herein represents all orsome selected subset of the data encoded within the barcode that hasbeen scanned. In one embodiment, when a complete message has beendecoded and written into RAM 50, the microprocessor 38 notifies the PDA26 to retrieve the data. To do this, the microprocessor 38 activatessome signal that will be detected by the PDA and passes the PDA pointerand length information. The pointer information comprises a pointeraddress indicating where in the Common Memory address space, the messagestarts. The length information indicates how many storage locations needto be read to get the complete message.

[0073] In alternative embodiments for some nonstandard and rarely usedbarcodes, the microprocessor 38 notifies the PDA each time any characterfrom the message has been written into RAM 50.

[0074] Notification of the PDA of the existence of a decoded message isdone by either activating an interrupt signal on the handshaking bus 46or by setting a bit in one of the configuration registers 66 that isperiodically polled by the PDA.

[0075] The configuration registers 66 comprise a Configuration Optionregister and a Card Configuration and Status Register. The CardConfiguration and Status Register is located two bytes above theConfiguration Option register in the Attribute Memory space (see FIG. 4for the details of the three PCMCIA defined regions in the address spaceof a PC card). The Card Configuration and Status Register provides thePDA with a mechanism to control a Status Changed Signal, an Audio Signaland a Power Down Request. It also provides status information in the“set” or “not set” states of certain bits defining a Status ChangedState and an Interrupt Request State.

[0076] In one embodiment, the PC card notifies the PDA of the existenceof a message to be picked up by asserting a Level Mode Interrupt signalon the handshake signal bus 46.

[0077] The microprocessor 38 can be interrupted by the PDA via an IRQsignal line 70. Such an interrupt request could be asserted by the PDA,for example, when the PDA has control of the shared address and databuses 52 and 50, respectively, so as to prevent the microprocessor 38from attempting to take control of these shared buses. The interruptservice routine of the microprocessor 38 would put the microprocessor ina suspended state where no processing is carried out since it is notpossible for the microprocessor 38 to access program instructions fromROM 40 while the PDA has control of the shared buses 50 and 52.

[0078] Chip selection of ROM/EPROM 40 and EEPROM 74 to activate thesememories and read/write control of EEPROM 74 is carried out via controlbus 60, address decode circuitry 61 and buses 76 and 78, respectively.EEPROM 74 is used to store PC card Information Structure (CIS) data inconformity with PCMCIA standards, said CIS data defining the formattingand organization of data on the PC card. In this way, any new PDA canread the CIS data to determine the format and organization of datastored in the PC card to insure compatibility of the laser based barcodescanner across multiple platforms having standard PCMCIA slots.

[0079] The microprocessor 38 receives a clock signal on line 80 fromclock 82. Power and ground connections are supplied to the PC card fromthe PDA via lines 84 and 86, respectively from the PCMCIA Bus 48. Atpower up time, a Power On Reset circuit 88. A PCMCIA hardware resetsignal on line 90 from the handshake signal bus 46 causes the PC card tobe reset under control of the PDA in case of a trap or other need toreset the program counter (not separately shown) of the microprocessor38 back to its initial state. The socket services software layerdescribed below can cause a hardware reset by asserting a Reset signal(not shown but part of the handshake signal bus 46) to the PC card. Ahardware reset automatically puts the PC card in Memory Only Interfacemode (as opposed to I/O mode) and it resets the Configuration OptionRegister to 00 Hex (00H). Other configuration registers and theReady/Busy signal on the Handshake Signal bus 46 are also affected asdescribed in the PCMCIA PC card Document which is incorporated herein byreference.

[0080] Referring to FIG. 4, there is shown a memory map of the threezones in the address space defined for a PC card by the PCMCIAStandards. Zone 1 is the Common Memory Space mentioned earlier. Thisshared memory space can be accessed either by the PC card microprocessor38 or by the PDA through a Memory Cycle as that term is defined in thePCMCIA Standards. The Common Memory Space may be used in someembodiments to store data such as the decoded data from the barcode andis used in one embodiment as the principal interprocess data pathbetween the decoding process in execution on the PC card and anyapplication process in execution on the PDA which needs the decodeddata. In other embodiments, the decoded data can be transferred to thePDA through Input/Output cycles. The Common Memory Space is also used inthe preferred embodiment for the nonvolatile memory on the PC card whichany application running on the PDA or host computer can freely accessfor any purpose.

[0081] Zone 2 in the address space of the PC card is the AttributeMemory Space. This memory space may be accessed by the PDA throughMemory Cycles. The Attribute Memory Space is the address space in whichthe various configuration registers on FIG. 41 and other Figures reside.The configuration registers 66 in FIGS. 3 and 41 are defined by the PCcard Standards incorporated by reference herein and are used by the PDAto control the operational configuration of the PC card. One of theseconfiguration registers is the Configuration Option Register whichstores the Configuration Index data in bits 0-5, the Interrupt Mode inbit 6 (pulsed=0, Level=1) and the PCMCIA Soft Reset in bit 7(asserted=1). Another of the configuration registers is the CardConfiguration and Status Register which stores data mentioned earlierherein.

[0082] Zone 3 comprises the Input/Output addresses accessed by the PDAthrough I/O Cycles by asserting the I/O Read signal, IORD, or the I/OWrite Signal, IOWR, on the Handshake Signal bus 46 while the AttributeMemory Select Signal, REG, and at least one Card Enable signal areasserted (all of these signals are on the Handshake Signal bus 46 andare not separately shown for the sake of simplicity in the figure).

[0083] Referring to FIG. 5, there is shown a diagram of one possiblesoftware architecture in the PDA to implement the industry standardPCMCIA PC card slot and interact with the PC card through the PCMCIABus. The PDA has in execution thereon a client application 92 such as aninventory processing program which uses barcode data to provide raw datainput as to what merchandise is in a particular inventory. The clientapplication 92 interacts through the PDA operating system process 93with the RAM 95, other circuitry and “native” input devices of the PDA,i.e., the pen-based display 94 or a touchscreen 96 or a conventionaldisplay 98 and keyboard 100. The operating system process 93 receivesrequests from the client process 92 to read data from or write data toRAM, receives interrupts from or polls the input devices and the PC cardregarding any new data from the input devices or PC card and passes thatdata to the client process 92 for processing.

[0084] The operating system process interacts with the PC card through amultilayer software process, a hardware interface and the PCMCIA Bus.When the operating system process desires to read data from or writedata to an address in the Common Memory Space, it utilizes interprocessdata path 102 coupling the operating system process to a MemoryTechnology Driver software process 104, i.e., layer. The function ofthis Memory Technology Driver process is to implement an interface witha Card Services software process 106 to mask the details of accessingspecific memory technologies. For example RAM is accessed differently inbipolar and CMOS and differently from one manufacturer to anothersometimes. Also, RAM is accessed differently than EPROM which isaccessed differently than EEPROM. To decouple the operating systemprocess 93 from this complexity, the Memory Technology Driver softwareprocess 104 contains the appropriate protocols and driver routines toaccess whatever type of memory exists in the PC card coupled to thePCMCIA Bus.

[0085] The Card Services software layer 106 serves to coordinate accessto whatever PC card or Cards that are connected to the PCMCIA Bus 48,sockets and systems resources among multiple client processes for thecard(s) in the PCMCIA socket. For access to memory on the PC card, theCard Services process 106 will receive a request via interprocess datapath 105 from the Memory Technology Driver process 106. For otherrequests, the operating system process communicates directly with theCard Services process via interprocess data path 108. There are numerousvendors for Card Services Software listed in the PCMCIA ResourceReference Book of Spring 1994 and the details of their offerings arehereby incorporated by reference.

[0086] The Card Services process 106 communicates via an interprocessdata path 107 with a Socket Services software process 110. This process110 serves to provide a standardized programmatic interface with the PCcard such that different client applications and operating systems maybe decoupled from the details of the PC card hardware and softwarestructure and changes therein and can communicate with and controldifferent PC cards in a uniform, standardized way. The Socket Servicesprocess 110 also serves to control and communicate with a SocketHardware Interface Circuit 112 via data and control path 113 to driveand control the hardware interface for the PCMCIA Bus 48 so as to senddata to, or get data from, the PC card, receive interrupts from the PCcard, send interrupt requests to the PC card and exchange varioushandshaking control signals with the PC card. There are numerous vendorsfor Socket Services Software listed in the PCMCIA Resource ReferenceBook of Spring 1994 and the details of their offerings are herebyincorporated by reference.

[0087] The function of the Socket Hardware Interface Circuit is to drivedata and control signals, power and ground potentials onto the pins ofthe PCMCIA Bus for transmission to the card and to receive data andcontrol signals from the PC card via the PCMCIA Bus and pass them to theSocket Services process 110 which then passes them to the Card Servicesprocess 106 from which they are passed, if necessary, to the MemoryTechnology driver process 104 and the operating system 93.

[0088] The details of the client application process 92, the operatingsystem process 93, the Memory Technology Driver process 104, the CardServices process 106, the Socket Services process 110 and the SocketHardware Interface circuit 115 are not critical to the invention and anyprocess or circuit that can interact in the manner described herein withthe software and circuitry described herein as resident on the PC cardwill suffice for purposes of practicing many species of the invention.Some species have on-board memory which the host must be able to accessthrough the PCMCIA bus without blocking access through the PCMCIA busfor I/O transactions with the decoder. The details of the Card ServicesLayer and Memory Technology Driver layer pertinent to these species aregiven below.

[0089] A decoding process 118 in execution on the microprocessor 38 inthe PC card exchanges the data and control signals with the SocketHardware interface to carry out the decoding of data from the signal online 42 from the laser scanning engine and passing of that data to thePDA Client process 92.

[0090] Referring to FIG. 6A, there is shown a flow chart of thepertinent parts of the decoding process 118 carried out in the PC cardin one subgenus. In another subgenus, the same or a similar decodingprocess takes place on the host. The decoding process starts withsampling of the HHLC signal state on line 42 in FIG. 3 so as to create abinary image of the barcode being scanned in memory prior to attemptingto decode the image. First, the microprocessor 38 must make sure it hascontrol of the buses. This step may not be necessary where the decodingprocess is being done on the host. This process is symbolized by step120. If the PDA has control of the buses, processing is suspended untilthe shared buses 50 and 52 are clear. Then step 122 is performed whichrepresents the process of polling the signal level on line 42 forchanges to determine if a barcode is being scanned. If no changes areoccurring, the decoding process does nothing and idles waiting for achange in level on line 42 as symbolized by path 124. As soon as changeoccurs, path 126 is taken to box 128 which immediately set theReady/Busy signal on the handshake signal bus 46 to the busy state.

[0091] Box 128 generally represents the process of periodically samplingthe HHLC signal on line 42 in FIG. 2 to determine its current state aseither logic 1 or logic 0. This is done by performing a read operationof parallel port 44 to determine the logical state of whatever pin towhich line 42 is connected.

[0092] Box 130 represents the process of storing the logic 1 or 0obtained from line 42 in the next sequential storage location in RAM 50.The microprocessor 38 periodically reads line 42 and assigns aparticular storage location in a sequence of storage locations in RAM 50to the result of the read operation. The sequence of storage locationscan be either contiguous or a linked list, the order of the locations inthe sequence corresponds to the order of the read operations. Thus thesequence of logical ones and zeroes stored in the sequence of locationswill represent a digital “image” of the transitions between white andblack in the barcode. The “image” is not an actual image but doesaccurately reflect the relative widths of the white and dark spaces inthe barcode, and it is in the ratios between the black and white widths,i.e., the relative widths of the white and black spaces, that thealphanumeric information is encoded. Because the reading of the statusof line 42 is periodic, the number of sequential logic 1's and logic 0'sreflecting the width of any particular light or dark space will varydepending upon the speed of the scan versus the period of the readcycles. However, the relative scan speeds between successive scans ofthe same barcode cancels out in the decoding process because the soughtafter information is encoded in the ratios of white to black, and theseratios remain constant for any particular barcode regardless of scanspeed. Box 130 also represents a process of recording a pointer addressto the start of the binary image message for data from the current scan.

[0093] Box 132 represents the process of checking for transitions online 42 indicating that barcode scanning is being performed by the laserscanning engine. If transitions are still occurring on line 42, path 134is taken back to the process represented by box 128 to take the nextsample. If no transitions have occurred for a period long enough toindicate that no barcode is being scanned, path 136 is taken to thedecode step 138. Path 136 is only taken once a complete scan of abarcode has occurred.

[0094] The first thing that is done by the process represented by box138 is to retrieve the count from an address counter variable used thatis indicative of the length of the sequence of storage locations thatstore the sequence of binary 1's and 0's making up the binary image ofthe current scan. This data will be used to flush the data from RAM 50by a bad read routine to be described later in case of an unsuccessfuldecode operation. If a linked list has been used, the number of entrieson the list and their locations is retrieved for passing to the bad readroutine if an unsuccessful decode occurs on the current scan.

[0095] Decode step 138 represents the known process of decoding thealphanumeric data encoded in the ratios of run lengths of logic 1's andlogic 0's in the binary “image” stored in RAM 50 of the barcode beingscanned. The details of how to decode barcodes are well known in the artand are not critical to the invention. The barcode scanning systemscommercially available from Symbol Technologies, Inc. of Bohemia, N.Y.,Telxon Corporation (model PTC-600), and PSC, Inc. of Webster, N.Y. allcontain such decoding software which will work to practice theinvention, and the details thereof are hereby incorporated by reference.The decode routine details may depend upon the type of barcode beingdecoded if the decoding software does not have an autodiscriminationroutine which automatically determines the type of barcode beingscanned. In the most useful embodiments however, an autodiscriminationroutine is included. The steps of the flow chart of FIG. 6B indicate thebasic functions of the decode step 138 that should be performed.

[0096] Referring to FIG. 6B, those steps will be briefly described. Box140 represents the process of executing the autodiscrimination routineto determine what type of barcode was scanned. This is done by examiningthe beginning and ending segments of the binary “image” to look for thestart and stop characters. These start and stop characters are differentfor each different class of barcodes and also indicate the beginning andend of encoded alphanumeric information. The autodiscrimination routinedecodes the start and stop characters and then vectors processing to adecode routine which is appropriate to the type of barcode which wasscanned. If the type of start and stop characters are not types whichare recognized or indicate the barcode is of a type for which no decoderoutine exists in decode process 138, path 142 is taken to the “badread” process represented by box 144. Path 142 also represents theprocess of passing to the bad read routine a pointer to the firstlocation used in RAM 50 for the binary “image” of the scan beingprocessed and length or location information indicating all thelocations in which components of the image are stored. The bad readprocess, in one embodiment, simply sends an appropriate signal to thePDA or to some indicator mechanism on housing 28 to cause an audiblebeep or a flashing visual indication. In order to flush the data fromthe bad scan, the bad read routine then retrieves the pointer to thestart of the binary image recorded for the current scan by the processof box 130 and retrieves the length of the sequence of storage locationswhich store data defining the “image” from the routine symbolized by box138. The bad read routine then flushes the image data from the bad scanand resets the pointer and image length variables/counters (dependingupon whether hardware or software are used to keep track of where andhow long the image is in memory 50). In embodiments where linked listsare used, the bad read routine retrieves the pointer to the start of theimage and the locations where each member of the sequence is storedflushes the data for the binary image from the RAM 50 and resets thepointer and locations data to prepare for the data from the next scan.Processing then returns to box 120 on FIG. 6A to wait for the next scandata.

[0097] If a memory usage/allocation table is used to keep track of whatlocations are used in RAM 50 and which locations are still available,the usage/allocation table data is altered to indicate that thelocations used for the bad scan data are now. available. Since scanningis continuous until either a timeout or an indication of a successfuldecode occurs, preferably, RAM 50 will have sufficient size to be ableto store data from enough complete scans so as to not overflow by thetime a bad read indication on any particular scan occurs and the memoryconsumed by that scan is freed by the bad read process for reuse.

[0098] An alternative bad read process to eliminate annoying visual oraudible indications of bad reads is symbolized by box 145 outlined indashed lines in FIG. 6B. In this process, the data from the bad scan isflushed in the manner described above and the pointer and lengthinformation is reset. Any memory usage/allocation table data is alteredto indicate the locations erased are available for reuse.

[0099] Next, the decoding process determines the direction of scan byexamining whether the start or stop character occurred first in thesequence as symbolized by box 146. If the scan was in the reversedirection, the process of box 146 will reverse the order of the decodedalphanumeric characters.

[0100] Box 148 represents the process of analyzing the binary image tocalculate the ratios of the run lengths of logic 1's and 0's. This isdone by counting the number of consecutive logic 1's and the numbers ofconsecutive logic 0's in the adjacent runs of 0's and calculating thepertinent ratios. Path 149 is taken to the bad read routine if theratios do not calculate properly or for some reason are not valid. Path149 also represents the process of passing pointer and length orlocation information pertaining to the storage locations in RAM 50 usedby the “image” data for the scan being processed to the bad read routinefor use by the bad read routine in flushing the image data from the badscan.

[0101] Decoding of the alphanumeric data from the ratios calculated inthe process of box 148 is symbolized by block 150. There are manydifferent barcode encoding schemes, and block 150 represents the uniqueprocessing necessary to decode whatever type of barcode has beenscanned, as determined by the process represented by block 140. Forexample, if a 3-of-9 barcode has been scanned, each alphanumericcharacter is encoded by 9 barcode elements of which 5 are black bars and4 are white spaces. Of these 9 elements, 3 are wide and 6 are narrow.All wide elements are the same width and all narrow elements are of thesame width. The process of calculating the ratios symbolized by block148 determines from the ratios in the image what sequence of wide andnarrow black and white spaces occurred. Each alphanumeric character hasits own unique sequence. The process of block 150 compares the detectedsequence to the known sequences, and if a match occurs, selects theassigned alphanumeric character for addition to the decoded message andmoves on to the next group of barcode elements.

[0102] If decoding is not possible, i.e., there is no match on anydetected sequence with a known sequence, path 151 is taken to the badread routine symbolized by either box 144 or 145. Path 151 alsorepresents the process of passing pointer and length or locationinformation pertaining to the storage locations in RAM 50 used by the“image” data for the scan being processed to the bad read routine foruse by the bad read routine in flushing the image data from the badscan.

[0103] Box 152 represents the optional process of calculating a checksumon the decoded result and comparing it to a checksum encoded into thebarcode if applicable. Not all barcodes have encoded checksums, so thisstep is omitted in cases where no checksum is available from the scannedbarcode. In cases where a checksum is available, if the two checksums donot match, path 153 is taken to the bad read routine. Path 153 alsorepresents the process of passing pointer and length or locationinformation pertaining to the storage locations in RAM 50 used by the“image” data for the scan being processed to the bad read routine foruse by the bad read routine in flushing the image data from the badscan.

[0104] If the two checksums do match in the process symbolized by box152, a successful decode has occurred, and path 154 is taken to theprocess of box 156.

[0105] The process of box 156 is optional, but is almost always useful.Many barcodes have some encoded characters that are not needed by theclient processes that used the data such as encoded checksum,supplementary suffix barcodes, start and stop characters etc. Box 156represents the process of filtering out any undesired characters fromthe decoded string. Box 156 will retrieve a filter specification fromthe client process 92 in FIG. 5. Typically, the user can enter datadefining which portions of a barcode to filter out and this data will bestored by the client process 92 and passed to the process symbolized bybox 156.

[0106] Box 158 represents the process of appending any desired prefix orsuffix information to the decoded string. Typical prefix informationincludes some identifier indicating the type of barcode which wasdecoded or a terminating character indicating the end of the decodedstring or which the client process 92 needs to know when it has receivedthe last character decoded from the barcode.

[0107] Returning consideration to FIG. 6A, after successful decoding hasoccurred, path 159 is taken to the process symbolized by box 160. Thisprocess involves sending an appropriate signal to an audible indicatoror visual indicator on housing 28 or on the PDA indicating a successfuldecode operation has occurred. The process symbolized by box 162 is thenperformed to stop the laser scanning mechanism from further scanning andcut off power to the laser, the scanning motor and other electronicswithin housing 28 so as to conserve the PDA battery.

[0108] Continuing on FIG. 6C, after the laser scanning engine is shutdown, the process symbolized by box 164 is performed to store the ASCIIor EBCDIC characters resulting from the decoding operation in RAM 50. Apointer address pointing to the start of the message in RAM 50 andlength information identifying how many storage locations should be readby the PDA to get the entire message are also stored by the process ofbox 164.

[0109] Next, the process symbolized by box 166 is performed to notifythe PDA that a decoded message awaits in RAM 50 for use by the clientapplication process 92 in FIG. 5. In most embodiments, the PDA isnotified by generation of an interrupt, although in other embodiments,the PDA may be notified of the existence of a decoded message by settinga bit in a particular location in the Common Memory Space, the AttributeSpace or the Input/Output Space to a state indicating that a decodedmessage awaits. The client application process 92 in FIG. 5 wouldperiodically poll this storage location using memory cycles or I/Ocycles to ascertain when the particular bit changes states, and, when itdoes, vector processing to a routine to retrieve the pointer and lengthinformation and then to retrieve the decoded message.

[0110] The process of box 166 also represents the process of eitheractively transferring to some prearranged memory location in RAM 95 onthe PDA or some prearranged register(s) in the PDA pointer and lengthinformation. The pointer information indicates the starting location inRAM 50 where the decoded message begins and the length informationindicates how many storage locations the PDA should read.

[0111] Processing then loops back to “start” on FIG. 6A after theprocess of box 168 is performed to release the shared address bus 52 anddata bus 50. The buses are released by reversing the state of theReady/Busy signal to a state indicating the buses are free for use bythe PDA to access RAM 50.

[0112] Note that RAM 50 can have more capacity than is needed simply toimplement the PCMCIA interface. This allows the bar code scanning engineinterface to have the additional function as serving as a flash memorycard for the PDA since many PDA and palmtop devices are severely limitedin memory capacity and need more to run complex programs. Up to fourmegabytes of RAM can be addressed in the Common Memory Space of a PCMCIAdefined PC card, but usually only two megabytes or less are required forthe bar code scanning engine interface. This enables PDA and palmtopdevices with only one PCMCIA slot to have the functionality of anexpansion memory card in addition to a laser based bar code scanning orother input device without having to switch PC cards. Expansion memorycards of DRAM, EEPROM and EPROM types are commercially available andmanufacturers thereof are listed in the PCMCIA Resource Reference Bookof Spring 1994. The details of these commercially available memoryexpansion cards is hereby incorporated by reference.

[0113] Referring to FIG. 7, there is shown a flowchart of typicalprocessing that occurs in a client application such as clientapplication 92 in FIG. 5 to turn the laser based barcode scanner on andcollect the decoded data. The user may have several programs on his orher PDA. Block 180 represents activation of the bar code scanningapplication. Block 182 represents a test performed by the clientapplication 92 to determine if the user has given a command to scan abarcode which has been placed in front of the laser scanning engine.This command can take many forms. For example, it can be a keyboardcommand in the case of a PDA or palmtop with a keyboard, or it can be atouch of a specific area displayed on the touchscreen 96 in FIG. 5 orpen-based display 94. In the case of a touchscreen or pen-based display,there will typically be an area displayed on the screen that queries theuser for his or her intentions such as “Start Scanning?” etc.

[0114] Until the user gives this start scanning command, the clientapplication idles as symbolized by path 184 in a typical embodiment. Inalternative embodiments, the client application can process previousmessages in foreground and perform the process shown in FIG. 7 in thebackground to collect new decoded messages to be placed in a queue forlater processing by the foreground process. The latter embodiment wouldfind typical application where heavy barcode scanning activity wasoccurring. No attempt will be made here to detail the processing of theforeground process in these embodiments since that processing can takeat least as many forms as there are uses for barcodes. For example, itmay be a point of purchase program to list items purchased andcommunicate that data to another inventory accounting or inventoryre-order process, or it may be shelf inventory program which gathersdata about the type of items in inventory where the clerk enters thetype information by scanning barcodes and then types or writes in thenumber of that type item remaining manually.

[0115] Once the user has given the start scanning command, the processsymbolized by block 186 is performed. In this process, the PDA clientprocess sends a command signal or data to the microprocessor in the PCcard telling it that the laser scanning engine is to be turned on. Thistriggers a process executed in the PC card symbolized by blocks 188 and190 to apply power to the laser scanning engine. Block 188 representsthe process of polling a particular memory location or register bit todetermine if the PDA has written data there indicating scanning is to bestarted or an interrupt service routine which is performed when the PCcard receives a particular interrupt request indicating that scanning isto be started. When the process of step 188 determines that the startscanning command has been given, the yes path to the process symbolizedby block 190 is taken. The process of block 90 simply sends a commandvia parallel port 44 and signal path 196 in FIG. 3 to a power controlswitch 194 to cause the switch to apply Vcc and ground potentials to thelaser scanning engine. Power to the laser scanning engine is cut off byswitch 194 by the process of block 162 on FIG. 6A after a successfuldecoding operation has been performed. Dashed line 189 in FIG. 7represents the hardware and software interface between the PDA and thePC card. Specifically, dashed line,189 represents any processingnecessary by: Memory Technology Driver software process 104, CardServices process 106, Socket Services process 110, Socket HardwareInterface 115 and the various interprocess transfer mechanisms, whichmay be necessary to get the control signal(s)/data represented by dashedline 191 properly from the PDA to the PC card to cause the desiredactions while providing a uniform, industry standard, PCMCIA definedprogrammatic interface to the PDA client application 92 and operatingsystem 93 regardless of the details hardware or software processesimplemented in the PC card. By implementing the barcode scanning engineon a PC card using an industry standard PCMCIA socket and bus, manyadvantages are achieved. Among them are: (1) many different inputdevices can be added to the PDA to add different functionality to it tocreate many different types of portable computing systems with the samePDA; (2) easy and fast maintenance because the system is not custom andthe input device simply plugs into an industry standard PCMCIA socket,so when the input device or the PDA fail, a new input device or PDA canbe quickly and effortlessly be substituted with very little downtime;(3) the customer is not locked into a particular technology or supplierso when technology improves or a supplier goes bankrupt or fails tointroduce new technology to keep up with the state of the art, thecustomer can simply buy the desired technology from a different sourcewith no fear of compatibility problems causing downtime.

[0116] The process symbolized by block 186 in FIG. 7 also sends acommand to the PC card indicating that it is permissible to flush theRAM 50 of any binary “image” data and any decoded alphanumericcharacters which are no longer needed as being related to barcodes whichhave already been processed by the client application 92.

[0117] After the laser scanning engine has been started and RAM 50 hasbeen initialized, the client application simply waits for a successfuldecode of the scanned barcode, as symbolized by block 200. As notedearlier herein, the PC card may notify the PDA of a successful decode bygenerating an interrupt, performing an I/O operation to send data to apolled location in the PDA memory 95 in FIG. 5 or some status register(not shown) within the PDA, or write data to a memory location in RAM 50or one of the configuration registers that is regularly polled by thePDA.

[0118] Block 202 represents the process of retrieving the decodedalphanumeric characters from the PC card. In particular, the PC cardwill pass to the PDA a pointer address in RAM 50 where the decodedmessage starts and the length of the message. In the case of aninterrupt-based notification process, block 202 represents the processof vectoring to the appropriate interrupt service routine to retrievethe message and carrying out that interrupt service routine. Processingby the service routine will set the Ready/Busy signal to a state toobtain for the PDA sole control of the shared address and data buses 52and 50, respectively, and then carry out a number of memory cycles toretrieve the data. This is done by writing the address of the firstalphanumeric character on shared address bus 52 and setting suitablecontrol signals on Handshaking Signal bus 46 and 46A to indicate that aread memory cycle of an address in RAM 50 is desired by the PDA. Thiscauses the address decoding circuitry 61 to activate the chip selectsignal coupled to RAM 50 and to generated suitable control signals onbus 64 to put RAM 50 into read mode. The desired character is thenretrieved by RAM 50 and put on shared data bus 50 where it is read bythe PDA. The address on the shared address bus 52 is then incremented tothe next address in the message, and the process is repeated until alldecoded alphanumeric characters have been retrieved.

[0119] In one embodiment, the memory cycles result in the decoded databeing transferred from RAM 50 in the PC card to the RAM 95 in the PDAfor further processing so as to free RAM 50 to store data resulting fromsubsequent barcode scans of different barcodes. In alternativeembodiments, the execute-in-place capability of the PC card will beutilized to process the decoded alphanumeric data directly out of theRAM 50 without first moving it to the PDA RAM 95 in FIG. 5. This has thedisadvantage of locking out the PC card microprocessor 38 from access toRAM 50, so no new barcode scanning can occur. However, in the case ofmost client applications, processing of the decoded barcode data will beso fast, that there will be no noticeable “dead” time where barcodescannot be scanned.

[0120] Block 204 represents whatever processing the client applicationdoes with the decoded alphanumeric data from the scanned barcode. Thedecoded data can processed for inventory control or point of purchaseneeds, exported to another process in execution on the PDA, transmittedout on a local area network to another process in execution on adifferent platform or otherwise dealt with including any combination ofthe above processing scenarios. In the case where the PDA or palmtopdoes not have a built-in Local Area Network interface, box 206 in FIG. 3represents commercially available hardware and software that has alreadybeen integrated on other PC cards by various manufacturers forinterfacing to Ethernet, FDDI, token ring etc. networks. These suppliersinclude Accton Technology Corporation of Fremont, Calif., and AdvanceMicro Devices, Inc. of Sunnyvale, Calif. as well as the othermanufacturers of PC card Ethernet, token ring and other types of LANinterfaces listed in the PCMCIA Resource Reference Book from Spring of1994. The LAN interface can be wireless, and such PC card based wirelessLAN interfaces are available from such manufacturers as NCR Corporationof Somerset, N.J. and the other manufacturers listed in the PCMCIAResource Reference Book of Spring 1994. The details of thesecommercially available LAN interfaces is hereby incorporated byreference.

[0121] The details of the LAN circuitry and hardware are not critical tothe invention and will not be described here. Any network interface for10Base2, 10BaseT, FOIRL or other type of network media from anymanufacturer that can integrate the interface on a PC card and whichwill not interfere with access by the host to the decoder through thePCMCIA bus or access to the sample data or HHLC signal through thePCMCIA bus will suffice regardless of whether the interface is RF,infrared or hardwired.

[0122] In alternative embodiments, the PC card may contain two separateRAM memories, one of which is devoted solely to storing binary imagedata from the scanned barcode and storing the alphanumeric characterswhich result from the decoding process, and the other of which serves asexpansion memory for the PDA. Such an embodiment can be used toimplement any of the peripherals described herein. However, it is moreuseful in the slower data stream embodiments using PC card interfacessuch as wand-based barcode readers, magnetic stripe readers, trackballsetc. so that the microprocessor 38 in the PC card does not dominate theshared RAM 50 during the long time it takes to process the input data inthe slow input stream thereby blocking access by the PDA to RAM 50(which may be needed expansion memory for the PDA in some embodiments).In such an embodiment, the microprocessor 38 need not check theReady/Busy handshaking signal before accessing its dedicated memoriessince the PDA will not be allowed access to the memories dedicated tothe PC card microprocessor. Such an embodiment is shown in FIG. 8. InFIG. 8, circuits having the same reference numbers as circuits in FIG. 3have the same structure and purpose in the combination and nothingfurther will be said about these circuits. Circuits outlined in dashedlines are optional. Note that the power control switch 194 is indicatedas optional. This is because the typical input device circuitry coupledto port 210 to which the interface of FIG. 8 is typically connectedconsumes less power than a laser based scanning engine and may be lefton all the time the PC card is in its socket on the PDA. If a laserbased scanning engine is coupled to port 210 and the interface isdesigned for use in a portable environment as with a PDA, switch 194 ispreferred and is controlled by the microprocessor 196 either through amanual trigger or the software start-stop mechanism previouslydescribed.

[0123] In FIG. 8, RAM#1 is the random access memory devoted to themicroprocessor 38 of the PC card. RAM#2 is the expansion RAM for the PDAbut is in the Common Memory space shared by the PDA and PC card. A busmultiplexer 212 serves to select which address and data buses arecoupled to the shared circuits 214, 66 and 206. The multiplexer selectseither the address bus 52 or the data bus 50 of the microprocessor 38,or the address bus 216 and data bus 218 of the PCMCIA Bus 48 forapplication to the applicable address and data ports, respectively, ofthe shared circuits. Control of this selection is made by the state ofthe Ready/Busy signal 230 which is one of the signals on the HandshakingSignal bus 46. When this signal is in a state indicating that themicroprocessor 38 is not asserting control over shared address bus 232and shared data bus 234, bus multiplexer 212 is in a state where theaddress bus 216 is coupled to shared address bus 232 via input B4 andoutput C4 of the multiplexer and data bus 218 is coupled to shared databus 234 via input B5 and output C5 of the multiplexer. This allows thePDA to read and write data stored in RAM#2 and the configurationregisters 66 or to bilaterally communicate with the LAN Interface 206such that data can be sent or received on LAN segment 207 (this segmentcan be hardwired or can be an RF or infrared link).

[0124] The Ready/Busy signal on line 230 is asserted by the PC card whenthe PC card microprocessor 38 needs to have access to one or more of theshared circuits RAM#2, configuration registers 66 or LAN Interface 206.When the bus multiplexer 212 is in this state, address bus 52 is coupledto shared address bus 232 via input A4 and output C4 and data bus 50 iscoupled to shared data bus 234 via input A5 and output C5 of the busmultiplexer.

[0125] The chip select signal inputs of the shared circuits 214, 66 and206 are coupled to the C3, C2 and C1 outputs of the multiplexer 212 viachip select lines 240, 242 and 244, respectively. These chip selectlines are coupled to chip select lines 246, 248 and 250, respectively,from the PC card's address decode circuit 61 when the microprocessor 38has control of the shared buses 232 and 234. Chip select lines 240, 242and 244 are coupled to chip select lines 252, 254 and 256, respectively,from the PDA's address decode circuit 260 when the PDA has control ofthe shared circuits.

[0126] The parallel port 44 of the microprocessor 38 has one pin whichis coupled to the Ready/Busy signal line so that microprocessor 38 canassert control over the shared buses 232 and 234 when necessary andblock the PDA's access to RAM#2. This typically happens after themicroprocessor 38 decodes the alphanumeric data from the barcode and hasit stored in RAM#1 but wants to move it to RAM#2 prior to notifying thePDA that a message is waiting in RAM#2 for pickup. To move the data fromRAM#1 to RAM#2, the microprocessor 38 uses on-board scratchpad RAM 270to store each alphanumeric character temporarily after a read operationwith RAM#1 and then writes the character from scratchpad RAM 270 toRAM#2. The microprocessor then notifies the PDA of the existence of amessage in RAM#2 by one of the mechanisms previously described.

[0127] In any embodiment disclosed herein for the PC card interface fora barcode reader input devices, an infrared motion sensor can be used asan optional means for starting the barcode reading process. Thisoptional configuration is symbolized by block 272 outlined in dashedlines in FIG. 8, although it is equally applicable to the embodimentshown in FIG. 3. The motion sensor 272, is also shown in dashed lines inFIG. 2 showing one possible embodiment. The symbol marked 272 in FIG. 2is supposed to represent the infrared beam generation and detectionapparatus and supporting circuitry of known motion sensors such as arefound in common use to turn porch lights on in homes upon the approachof a moving object to the front door of a home. The circuitry andoptical design of these units is hereby incorporated by reference.Motion sensor 272 emits infrared interrogation beams from the frontwindow 27 by bouncing a beam 274 off the scanning mirror 18c so as todirect the beam out the window 27. Obviously the scanning mirror must beable to reflect infrared radiation and the window 27 must be able topass it. When motion occurs in front of the front window 27, theinterrogation beam is reflected and doppler shift or changes inreflected energy levels trigger the motion sensor to generate a controlsignal on line 276 in FIG. 8. This signal is detected by themicroprocessor 38 which generates a signal on line 196 to switch 194 toapply power to the other barcode scanning circuits in the housing 28.The motion sensor has power applied to it at all times the PC card isinserted in its socket as long as the PDA is on.

[0128] Referring to FIG. 9, there is shown an embodiment of wand-typebarcode reader coupled to a PDA through a PCMCIA PC card. The wand 5 ofthe barcode reading engine within housing 28 is shown as tethered tohousing 28 by cable 7. In the alternative, the optical and light sourceequipment within wand 5 may be built into a nipple projection 9extending from the side of front of the housing 28. Wand type barcodereaders require a different type of interface circuit integrated on thePC card because the signal output from the wand type barcode reader isusually different from the signal output by a laser-based barcodescanning engine. The principal difference between the wand barcodescanning engine and a laser-based HHLC output is in the speed of thedata stream. The output signal from a wand barcode reader is slow enoughto decode in real time. Therefore, although the circuit of FIG. 3 may beused with or without a LAN interface, the software that microprocessor38 implements for the interface implemented on the PC card 32 in FIG. 9need not buffer the data of the binary image in RAM 50. Other than that,the software that implements the wand interface on the PC card is quitesimilar to the software shown in FIGS. 6A, 6B and 6C, and the softwarerun by the client application 92, the Memory Technology driver process104, the Card Services process 106, and the Socket Services process 110is identical to the software symbolized by FIG. 5 and described in partin FIG. 7. Likewise, the hardware interface circuit 115 and interprocesstransfer mechanisms symbolized on FIG. 5 are identical to those neededto implement the PC card interface for a laser-based barcode scanningengine.

[0129] Referring to FIG. 10, there is show a flow chart for a typicalprocess flow to implement a PCMCIA based PC card interface for aconventional wand type barcode reader housed within housing 28 shown inFIG. 9 as attached to the PC card interface circuit 32. The circuitry ofeither FIG. 3 or FIG. 8, or equivalents, including interfaces based uponthe Dr. Neuhaus PCMCIA Interface Controller Chip, which is commerciallyavailable from Neuhouse GMBH, the details of which are herebyincorporated by reference, may be used to implement the interface on PCcard 32 or any of the other PC card interfaces disclosed herein. Thesoftware of FIG. 10 may be executed on any of these equivalent circuits.

[0130] In addition, the software depicted in FIG. 10 is only oneexemplary embodiment of the type of interface software which may beexecuted on the circuitry integrated on PC card 32. Numerous wand basedbar code readers are presently commercially available, and the decodingsoftware in these devices can be adapted to the requirements of thePCMCIA defined PC card and ported to the particular circuitry used onthe PC card. The details of the commercially available wand basedbarcode reading software is hereby incorporated by reference.

[0131] The process symbolized by the flow chart of FIG. 10 starts bychecking for activity on the signal line 42 from the buffer 36. It isassumed that Vcc power and ground potentials have been applied to thewand circuit by one of the trigger mechanisms previously described orpower is applied continuously. Step 280 represents the process ofmonitoring line 42 for changes in the signal level thereon. If nochanges are occurring, the process idles at step 280 as symbolized bypath 282. Once activity is detected, step 284 is performed to sampleline 42 to determine if a logic 1 or logic 0 is present. This samplingis done periodically so that the relative ratios of white space width toblack space width can be calculated.

[0132] Although with a wand interface, it is not necessary to store allthe ones and zeroes of the complete “image” of the barcode, it isdesirable to store enough 1's and 0's to have a stored image of at leastthe barcode elements that make up one character or, at a minimum, enough1's and 0's so as to have enough elements of the barcode to determine byratios of run lengths whether a particular set of 1's or 0's is a widebar, a narrow bar, a wide white space or a narrow white space or quietzone. This may be done with a timer timing the times between transitionssuch as by using a counter which starts at one transition and stops atthe next etc. and storing the times between transitions. Therefore, step286 is performed to add the sampled logic 1 or 0 to a buffer used tostore the necessary bits in the minimum image.

[0133] Step 288 represents a test to compare the sampled value from step284 to the last sampled value to determine if the new sampled bitrepresents a transition from a logic high to a logic low state or viceversa. This is done so as to keep track of how many barcode elementshave been received where two transitions represent the two edges ofeither a dark bar or a white space. It is necessary in some barcodessuch as 3-of-9 to know how many barcode elements have been received sothat it is known when to start decoding a character since a character isencoded into 9 barcode elements in 3-of-9 code. In some other codes, thenumber of barcode elements making up a character may vary, so the stepsdetailed herein revolving around counting how many transitions haveoccurred may be eliminated. The most general software interface for awand barcode reader interface on a PC card is shown in FIG. 11 where thetype of barcode being read is detected and processing is vectored to adecode routine which is appropriate to decode that type of barcode.However, in the embodiment of FIG. 10, it is assumed that the barcodeuses the same number of barcode elements to encode each alphanumericcharacter and only alters the sequence to distinguish betweencharacters. As such, step 290 represents the process of incrementing atransition count kept in hardware or software. Step 292 tests thetransition counter and compares the number of transitions against thenumber of transitions which define a complete set of barcode elementsencoding one alphanumeric character.

[0134] The process symbolized by block 294 does the decoding work. Morespecifically, the process represented by block 294 represents amultiplicity of functions which are similar, and mostly identical tothose previously described with reference to step 138 in FIG. 6A and itssubsteps detailed on FIG. 6B. First, the numbers of logic 1's and 0's inthe run lengths are counted, and the ratios calculated and compared.This yields ratios of logic 1 to logic 0 run lengths from which thesequence and relative widths of the black bars and white spaces can becalculated. Next, if the decode step is being done on the firstcharacter, the type of barcode and direction of scan is determined bydetermining the sequence and timing of transitions as the start/stopcharacter is scanned (the same character coding is used for both, but itis asymmetrical so that the direction of scan can be determined). Thetype of barcode can be determined by determining what start/stopcharacter was scanned since each barcode type uses a differentstart/stop characters. Processing is then vectored to a decoding routinewhich is appropriate for the type of barcode scanned and the particularsequence of barcode elements is compared to the known sequences. If nomatch occurs, path 296 is taken to a bad read routine which waspreviously described at blocks 144 or 145 of FIG. 6B. If a successfulmatch is found, decoding of the character is deemed to be successful andthe buffer memory, typically RAM#1 in FIG. 8, is flushed of any imagedata which pertains to the character successfully decoded. Step 298 isthen performed to store the decoded character in RAM#1 or, in someembodiments, in RAM#2 so as to avoid the need for a later transfer.

[0135] Step 300 represents the process of determining whether thecharacter just decoded is the stop character. If not, processing isvectored back to step 284 to begin the process of sampling for the imagedata for the next character. If the stop character is detected, thebarcode has been completely scanned and decoded. In that event, step 300represents the process of recording the length information defining howlong the decoded message is and a pointer to where the decoded messagestarts in RAM#1 or RAM#2. Step 302 then is performed to notify the PDAof the existence of decoded barcode message and pass the pointer andlength information to the PDA.

[0136] Referring to FIG. 11, a flowchart for a more general type of PCcard implemented wand interface is shown which can decode any type ofbarcode. It will be appreciated by those skilled in the art that thewand interfaces described herein can also be used for laser scanningengines that have a wand emulation mode and for any other type of inputdevice which outputs a stream of 1 's and 0's in which data is encodedin the ratios of the relative run lengths. Steps 304 and 306 in FIG. 11serve the same purpose as steps 280 and 284 in FIG. 10. Step 308represents known decoding processes in commercially available wand-basedbarcode readers to decode the stream of 1's and 0's. In someembodiments, this may be done “on the fly”, i.e., without storing themin a buffer, and in other embodiments, this is done by buffering some orall of the “image” data. The individual steps performed as part of step308 are as described above with reference to FIG. 6B to determine thetype of barcode which has been scanned, the direction of scan,calculation of run lengths and ratios, determining the sequences ofbarcode elements and decoding the sequence using an algorithm which isappropriate to the type of barcode which has been scanned, calculate achecksum and compare it to a checksum encoded in the barcode, filteringout unwanted parts of the decoded message, and appending any desiredsuffix or prefix characters or a termination character. Steps 310 and312 represent the process of recording the decoded characters in eitherRAM#1 or RAM#2 along with a pointer to where the message starts andlength information and passing the pointer and length information to thePDA with notification of the existence of the message.

[0137] Referring to FIG. 12, there is shown a block diagram of aninterface for integration on a PC card to couple virtually any type ofinput device that has an output port at which appear signals defined inany of the EIA defined serial interfaces, or which a parallel formatoutput port or which outputs data at signals at standard TTL or CMOS orMOS or ECL logic levels. The circuits that have the same referencenumbers as circuits in FIG. 8 have the same structure and purpose in thecombination as-their counterparts in FIG. 8 and will not be describedfurther.

[0138] The difference between the interface of FIG. 8 and the interfaceof FIG. 12 is in the type of signal received from the input device. InFIG. 8, the type of signal received was a single line on which either alogic 1 or logic 0. These could be at TTL or MOS or CMOS or ECL logiclevels and buffer/receiver 36 would convert them to the appropriatelogic levels used by microprocessor 38. The interface of FIG. 12functions to receive virtually any format output from an input deviceand convert it to signals appropriate for PCMCIA Bus 48 and get the datainto the PDA. The circuitry above dashed line 350 represents theinterface on the PC card between the output of any conventional inputdevice 352 and the PC card's circuitry that gathers the data, convertsit to PCMCIA format for the PCMCIA Bus 48 and causes the data to beinput to the PDA. This circuitry can be integrated into the PC cardinterface of the type shown in FIG. 12 or as shown in FIG. 3. The inputdevice can be either integrated into a housing permanently attached tothe PC card or it can be of the clip-on variety such as taught in theparent case or such as is taught in U.S. Pat. No. 4,621,189 assigned toTelxon Corporation, which is hereby incorporated by reference. Inalternative embodiments such as are symbolized by FIG. 13, the inputdevice can be tethered to the PC card by a cable carrying data, controland power lines. The input device 352 can be any known peripheralincluding but not limited to: (1) a laser-based barcode scanning enginewhich has a port for data, output in other than HHLC format (those typeof laser scanners typically use the interfaces shown in FIGS. 3 or 8);(2) a charge coupled device based barcode scanning engine 360 such as issymbolized in FIG. 14; (3) a magnetic stripe reader 362 such as are usedto read credit cards etc. as symbolized by FIG. 15; (4) a magnetic inkreader 364 such as is used to read MICR characters often seen on checksand bank drafts, as symbolized by FIG. 16; (5) an optical characterrecognition device 366 such as is symbolized by FIG. 17; or (6) atrackball, mouse or other pointing device, as symbolized by FIG. 18; or(7) a full size keyboard or 10 key keypad such as are used with fullsize computers as shown in FIG. 19. Virtually every computer peripheralhas either a serial or parallel output port which can be used to connectthe input device to the interface circuit of FIG. 12 regardless ofwhether the input device is integrated into a housing permanentlyaffixed to the PC card or attached thereto by clip-on mechanical andelectrical connections.

[0139] Dashed line 370 represents the connection from the input device352 to the appropriate format electrical connection to the PC cardinterface circuitry regardless of whether the data transfer format isserial, parallel or TTL levels and regardless of whether the inputdevice is tethered to the PC card by a cable or integrated into ahousing which is mechanically attached to the PC card. Assuming that theconnection 370 represents a serial data path containing the signalsdefined in any one of the EIA national standard serial format interfacessuch as RS232C, RS422, RS423 or RS485, the microprocessor 38 willcommunicate with the input device through UART or ACIA chip 372. TheUART/ACIA is a universal asynchronous receiver/transmitter whichreceives serial data on line 374 and places that data on the parallelformat data bus 50 of microprocessor 38. In some embodiments, the UARTmay be built into the microprocessor 38 or its functions performed bysoftware and registers within the microprocessor. Data to be transmittedto the input device, if any, can be put on the data bus 50 under programcontrol and the UART will convert that data into a serial stream of datato be sent out on line 374 which is coupled to line 370. Actually lines374 and 370 are multisignal buses and includes data transfer and controlor handshaking lines carrying signals such as Clear to Send, Data SetReady and the other signals defined in the EIA national standard. Bus374 is coupled to each of the four different serial “ports” 376, 377,381 and 381 symbolizing each of four different EIA defined serialinterfaces. In additions, an Apple ADB port 375 is also shown to coupleto input devices which output their data in ADB format. These ports 376,377, 381 and 381 and ADB port 375 are referred to as ports even thoughthere may not be an actual connector, and the signal lines in the serialdata path may simply pass from the PC card interface circuit directly toappropriate circuitry of the input device integrated in a housingaffixed to the PC card by permanent or temporary clip-on connections.The actual signals on bus 374 will depend upon which EIA standard serialport the input device 352 is coupled. Likewise, the particular UART/ACIA372 selected will depend upon which serial interface defines theconnection between the input device 352 and the PC card interface. TheRS232C interface port will be used herein as an example symbolizing eachof the serial interface embodiments within the teachings of theinvention. In the case where a UART is selected for transceiver 372, theUART must be programmed to tell it how many data bits, start bits andstop bits to use and whether parity is odd, even or none etc. Thiscontrol information depends upon the input device being used and can begiven to the UART by: hardwiring the various control input pins to theappropriate logic 0 or logic 1 potential sources; connecting these pinsto a status register (not shown but coupled to data bus 50) which can bewritten with the appropriate data under program control during aninitialization process; or supplied via control bus coupled to parallelport 44 on microprocessor 38. UART/ACIA 372 is coupled to clock 82 byline 382 to control its transmit baud rate, and is selected ordeselected for operation by chip select line 384 from address decoder61. The input device 352 may generate an interrupt request on line 353to the microprocessor 38 to tell the microprocessor that data has beensent to the UART, PIA etc. or the microprocessor 38 can periodicallypoll the input device via line 353 to determine when data is availablefor the microprocessor to pick up. In the alternative, the UART/ACIA cangenerate an interrupt or set a bit in a register which is polled by themicroprocessor 38 to indicate when data is available for pickup.

[0140] Although the UART/ACIA and microprocessor 38 are shown as coupledto the ADB port 375, other interface electronics and software may benecessary as specified by Apple Computer in their ADB specificationentitled “SPECIFICATION, APPLE DESKTOP BUS”, Drawing Number 062-0267Rev. F dated Jul. 17, 1990 or any subsequent revisions to date. Thedetails of that specification and of the commercially available hardwareand software in existing computer systems such as the Apple IIci arehereby incorporated by reference.

[0141] In embodiments where the input device outputs data in a parallelformat, the input device will be connected via bus 370 to a one chipparallel I/O port referred to as a peripheral interface adapter or PIA386. A PIA is a combination of bus transceivers and registers designedto interface peripheral equipment in parallel manner to externalequipment. Although a separate PIA is shown in FIG. 12, thefunctionality of the PIA 386 may also be embodied in the microprocessor38 through one of its unused parallel ports. Two or more parallelinput/output channels whose I/O directions are programmable are usuallyavailable. The microprocessor 38 controls the PIA 386 via parallel port44 and control bus 380 and through bytes written to the PIA via data bus50. The microprocessor sends data to and receives data from the PIA viadata bus 50. Data bytes are sent to output registers within the PIA andcontrol bytes are sent to control registers within the PIA under programcontrol. The control program executed by microprocessor 38 isresponsible for, directing bytes on the data bus 50 to appropriateregisters within the PIA by control over the addresses which appear onthe address bus 52 and bits or control signals on control bus 380(control registers within the PIA look to the control program ofmicroprocessor 38 like memory locations since they are decoded using twoor three chip select signals on bus 380 or bus 388. The PIA is enabledvia the chip select bus 388 from address decoder 61. The PIA notifiesthe microprocessor 38 that data has been received from the input deviceand is stored for pickup via an interrupt request on line 390 or bysetting a bit in one of the control registers which is periodicallypolled via the data bus 50. Interrupt and status control signal betweenthe PIA 386 and the input device 352 are passed via interrupt and statuscontrol registers within the PIA to which the bus 370 is coupled.

[0142] The PIA typically has two data ports which are eight bits wideand which are coupled to the bus 370 for passing data to and receivingdata from the input device 352. These ports are directional and each canbe programmed to either send or receive data by setting of a control bitin a data direction register within the PIA. When the microprocessor 38receives an interrupt request from the PIA or polls a bit in a controlregister within the PIA dedicated to interrupts and notes that datareceived from the input device is being stored in the PIA for pickup,the microprocessor 38 reads the output register within the PIAassociated with the PIA port which has been programmed to receive. Thedata stored therein then appears on the data bus 50 and can betransferred to some internal register of the microprocessor, theaccumulator thereof or to RAM #1 or RAM #2.

[0143] Typical PIA accept any signal level below 800 millivolts as logic0 and anything above 2.0 volts as a logic 1. In the output mode, the PIAwill typically supply 1.6 millivolts of sink current or one standard TTLload. The above discussion typically defines the characteristics of portPA of a typical Motorola PIA (Model 6821) Typical Motorola PtA's havedifferent characteristics for their PB ports, and this port can be usedgenerally if high power switching control of the input device is needed(typical current sink capability of one milliamp at 1.5 volts).

[0144] The Motorola 6821 PIA also has two discrete programmable I/Olines (CA2 and CB2) and two discrete input-only control lines (CA1 andCB1) which can be coupled to bus 370 and which respond to bits in thecontrol registers in the PIA. The CA1 and CB1 lines can each beprogrammed to cause interrupts on the rising edge of data at the CAinputs for use by the microprocessor in controlling the input device andin controlling data transfers between the PIA and the input device ormicroprocessor 38. The CA2 and CB2 lines can be programmed to act asinterrupt lines or output lines for use by the microprocessor incontrolling the input device and in controlling data transfers betweenthe PIA and the input device or microprocessor 38.

[0145] To interface with input devices which do not have either industrystandard serial or parallel data outputs interface circuit 400 isprovided. The details of this circuit are not critical to the inventionand depend upon exactly what the input device output structure andsignal levels are. Interface circuitry 400 is designed to acceptwhatever logic levels are inherent in the technology used by theparticular input device 352 coupled to the PC card. The technologiesinvolved can be anything from TTL to MOS/CMOS or ECL. Typically,interface circuit 400 has the same structure as either PIA 386 or ACIA372 with whatever additional driver/receiver circuitry and levelshifting circuitry is necessary to convert from the logic levels in useby the input device 352 to the logic levels used by microprocessor 38plus the necessary data storage and control circuitry to put the levelshifted data on bus 374 in serial format or on data bus 50 in parallelformat in a manner consistent with discussion herein of the operation ofPIA 386 and the UART/ACIA 372.

[0146] Referring to FIGS. 20A and 20B, there is shown a flow chart forthe control process executed by microprocessor 38 to send data to andreceive data from the input device via the UART 372. Block 402represents the process of enabling and initializing the UART with datacontrolling whether parity is odd, even or not used, and controlling thenumber of start and stop bits to use in communicating with the inputdevice 352. The UART is enabled by writing its address on address bus 52thereby causing the address decode circuit to activate the chip selectsignal on line 384. Data is loaded into the transmit holding register bychecking the status of a Transmit Holding Register Empty signal oncontrol bus 380, and if the register is empty, placing the data to besent to the input device on the data bus 50 (block 406) and activating aTransmit Holding Register Load signal on control bus 380. The UART thenautomatically performs any necessary handshaking with the input devices352 such as activating a Request to Send line on bus 370 and waiting forthe input device 352 to activate the Clear to Send control signal on bus370. The data is then output serially at the transmit clock rate on aTransmit Data line of bus 370 by shifting it out of aparallel-in-serial-out shift register within UART/ACIA 372 coupled toline 374.

[0147] The data to be sent to the input device depends upon the inputdevice but can include a control bit to start scanning or other dataprocessing therein. Typically scanning or other processing is controlledby the microprocessor 38 under control of the client application 92 inFIG. 5. When the client application directs the input device to startprocessing, microprocessor 38 applies power thereto via switch 194 andprocessing automatically starts. Alternatively, power can be applied,and then the microprocessor sends a bit or control byte to the inputdevice via steps 404 and 406 to start transmission of data to the PCcard after initialization of the UART/ACIA. In alternative embodiments,the microprocessor 38 can automatically apply power to the input devicevia switch 194 when the PC card is inserted in its socket and the inputdevice 352 can operate autonomously and gather data and generate aninterrupt or set a “data waiting” status bit when data has beencollected and is waiting for reading by the microprocessor 38.

[0148] The input device 352 typically works autonomously with theUART/ACIA to transmit data destined for microprocessor 38 to theUART/ACIA 372. Typically, the input device will gather data by reading amagnetic strip, scanning a barcode, reading a MICR character etc. andthen activate a Request to Send signal line on bus 370. When the UARTactivates a Clear to Send line on bus 370, the data is transmittedserially to the UART/ACIA where it is shifted into aserial-in-parallel-out shift register within the UART/ACIA. TheUART/ACIA 372 then loads the received data in parallel format to aReceive Holding Register within the UART and activates Data Receivedcontrol/interrupt signal on control bus 380 or as a separate interruptsignal line (not shown). The Data Received signal can be used to set abit in a register which is periodically polled by microprocessor 38 viadata bus 50. The process of waiting for such an interrupt orperiodically polling for a change in status of a bit set by the DataReceived signal is symbolized by test 408 of FIG. 20A. The processsymbolized by block 410 represents the process of activating the DataReceived Reset signal on control bus 380 to flush the Receive Registerinternal to the UART/ACIA 372 to prepare it to receive the next byte.The process of block 412 is then performed to read the Receive HoldingRegister via data bus 50 and temporarily store it in a register orscratchpad RAM in microprocessor or load the data into RAM#1.

[0149] Block 413 represents the process of reading the various errorsignals generated by the UART/ACIA on the control bus 380 to determineif any error has occurred such as framing, parity, overrun etc. If anerror has occurred, the process symbolized by block 415 is performed toperform error recovery, indicate a bad read, request retransmission orany combination of the above. If no error has occurred, path 417 istaken to step 414 on FIG. 20B.

[0150] If this is the first data byte received, step 414 detects thisfact and processing is vectored to step 416 where a pointer address tothe location of this first byte in RAM#1 or RAM#2 is recorded. Step 418is then performed to increment a length counter (count kept in eithersoftware or hardware) which is used to record data that will be laterused to tell the PDA how many bytes to read to get the complete message.

[0151] The test of block 419 generally represents the process ofdetermining if any further data bytes are to be forthcoming. This can beby a timeout, a signal from the input device, a lack of activity etc. Ifthe last byte has been received, the process of block 420 is performedalthough in some embodiments, each byte will be transferred into commonmemory and the PDA notified to pick it up without waiting for receipt ofall bytes. If the last byte has not been received, processing flows tothe “Next Byte” label on FIG. 20A to pick up the next byte from theUART/ACIA

[0152] Generally, an input device which outputs its data on a EIAstandard serial port, at least in the case of a barcode scanning engine,will have already decoded the barcode, and the serial output data willbe ASCII, EBCDIC or characters from some other standard code set. Incase the bits being output serially are not decoded, processing thenproceeds to the type of decoding processes previously described for raw“image” data. It will be assumed in the process symbolized by FIG. 20Aand FIG. 20B that the serial input data has already been decoded and isASCII characters.

[0153] Assuming the data has not already been stored in RAM#2, themicroprocessor 38 now moves the data from wherever it was temporarilystored in step 412 to RAM#2 in the shared memory space of the PDA inpreparation for transfer to the PDA. This process is symbolized by step420. In the embodiment of FIG. 12, this step involves asserting theReady/Busy signal to lock out the PDA from the shared buses 232 andcause the bus multiplexer 212 to coupled address bus 52 to sharedaddress bus 232 and coupled data bus 50 to shared data bus 234. Themicroprocessor 38 then selects RAM#2 by writing an address therein ontoaddress bus 52 and loads the data to be transferred onto data bus 50 andactivates suitable control signals to place RAM#2 in write mode via bus240.

[0154] The microprocessor 38 then notifies the PDA 26 that there is amessage to be picked up in RAM#2 (or RAM 50 in the case of an embodimentusing the structure of FIG. 3) and passes to the PDA a pointer addressindicating where the message starts and length information indicatinghow many bytes are in the message.

[0155] Referring to FIG. 21, there is shown a flowchart for theprocessing performed by microprocessor 38 in controlling PIA 386 andusing it to communicate with the input device. Block 430 represents theprocess of initializing the PIA by writing suitable control bits on databus 50 and suitable control bits on control bus 380 to program the A andB ports of the PIA according to the needs of the particular input deviceselected for coupling to the PIA. Block 430 also represents the processof sending any necessary data to the input device to control itsoperations to start gathering data. Some input devices will require nodata be sent from the microprocessor 38.

[0156] Typically, the input device 352 and the PIA will workautonomously together to transfer data between themselves. For example,after the input device has been powered, it begins gathering data aspreviously described and when data is ready for transfer to the PIA, aninterrupt will be generated on bus 370, usually in the form ofactivation of the CA1 signal (not separately shown) on bus 370 andloading of the data byte to be transferred in parallel on the eight (or16 etc.) parallel lines of the data path within bus 370. This data getslatched into a parallel load register within PIA 386. An interrupt willbe generated by the PIA on line 390 when a byte has been latched intothe PIA and the input device has activated the CA1 signal line. The testof 432 in FIG. 21 symbolizes the process of receiving this interrupt orpolling for a changed status bit in one of the PIA control registersindicating a byte is waiting to be read.

[0157] Block 434 represents the process of reading the byte that waslatched into the PIA from the input device and temporarily storing it.In some embodiments, since the received byte is assumed to be alreadydecoded and the input device is assumed to already have error checkedit, the byte will be immediately written into the common memory spaceand the PDA will be notified of its existence and where to read it. Inthe embodiment symbolized by FIG. 21, the byte is immediately stored inRAM#2 in the common memory space as are all subsequent bytes until acomplete message is received. In other embodiments, the complete messagewill be stored in RAM#1 and then moved into RAM#2 and the PDA notifiedonly after the complete message is received.

[0158] Block 436 represents the process of determining if the bytereceived was the first byte. If it was, the process of block 438 isperformed to store a pointer indicating the address in RAM#2 in whichthe first byte was stored, and then the process of block 440 isperformed to increment the length count. If the byte received is not thefirst byte, processing flows directly from step 436 to 440 to incrementthe length count.

[0159] The process of block 442 represents the determination of whetherthe last byte was received either by receipt of a signal from the inputdevice, counting a known number of bytes that are to be sent or someother suitable methodology. If the byte received was not the last,processing vectors to block 432 to wait for the next interrupt orpolling indication of the arrival of a new byte. If the test of block442 indicates that the byte received was the last byte, block 444 isperformed to notify the PDA and pass it the pointer and lengthinformation. The PDA then performs sufficient memory cycles on sharedmemory RAM#2 to retrieve the entire message and pass it to the clientapplication 92.

[0160] In alternative embodiments for a PC card interface where theinput from the barcode scanner is undecoded 1's and 0's defining abinary “image” of the transitions (HHLC) and where the decoding of the“image” is to be done in the PDA instead of the PC card, a two differentinterface configurations are used. In the first configuration, thecircuitry is the same as defined in FIGS. 3 or 8, but the software isdifferent. Basically, the software for this embodiment of interface willsample the input signal line from the receiver/buffer 36 and then simplystore this data in RAM 50 or RAM#1 or RAM#2 in FIFO fashion whilestoring a pointer to where the image data starts and how long it is. ThePDA will then be informed of the existence, location and length of theimage data and will retrieve it in a plurality of memory cycles. Theclient application 92 running on the PDA microprocessor (or anotherseparate decoding process) will decode the “image” data in the mannerdescribed above in, for example, FIGS. 6A, 6B and 6C, and pass thedecoded alphanumeric characters to the client application in executionon the PDA that needs the data.

[0161] The second configuration for an interface where the PDA does thedecoding substitutes a DMA device for the microprocessor. In addition,any additional logic necessary to perform the control functions themicroprocessor 38 performs which cannot be performed by the DMA devicewill be added. The DMA device will receive data from the input device byinterrupt processing etc. and store it in RAM within the Common MemorySpace shared by the PDA. The DMA device or its supporting control logicwill then notify the PDA of the existence, location and length of thebinary “image” data and the PDA will decode it using a process likethose previously described and pass the decoded alphanumeric charactersto whatever client application running on the PDA, a network serversomewhere else or by modem to another process in execution elsewhere.

[0162] There are no known barcode scanner interfaces to PDA's whichutilize the PCMCIA defined PC card standard. Current portable barcodescanning systems are all proprietary, custom designed systems which arenot compatible with hardware or software manufactured by othermanufacturers. Users are thus locked into the offerings of only onemanufactures which may not fulfill their current or future needs. Thisproprietary prior art technology is typified by the portable barcodescanning systems offered by Symbol Technologies Inc. and Telxon.

[0163] Another significant advantage of using a PC card interface forbarcode scanners and other types of input devices is the ease andrapidity with which a malfunctioning system can be repaired. Because PCcards are removable, a malfunctioning barcode reader can be simplyremoved from the system by pulling out the PC card to which the barcodereader is attached and replacing the unit with another that is known tobe good. The defective unit can then be repaired at a more leisurelypace without completely disrupting portable barcode scanning operations.

[0164] Another advantage of a PC card interface for an input device isthe ability to simultaneously expand the memory capacity of the PDA insingle PC card slot PDA's. There are many PC cards currently availablewhich serve the sole purpose of expanding the rather limited memorycapacity of some PDA's or providing network connectivity or modemcapability. This allows more complex processing to be performed withlarger programs.

[0165] Another advantage of using a PC card interface for an inputdevice is the execute in-place capability of PC cards. This capabilitymeans that the software or data encoded in a PC card's memory can beexecuted or accessed directly from the memory of the PC card withoutfirst downloading it into the PDA memory. This means that there need beno concern that the code implementing the interface for whatever inputdevice is connected to the PDA will be too large to fit into the PDAmemory or that the data defining the “image” or decoded message datawill be too large to fit in the PDA memory.

[0166] Referring again to FIG. 12, there are shown two additionalcircuits which are useful to add functionality to the PDA and improveuser feedback for communication functions or barcode scanning orgathering of other data from the input device 352. A modem 450 coupledto the data bus 50 and the control bus 380 can be used to output thedecoded alphanumeric characters or binary “image” data via phone line452 to a process in execution remotely. Such PC card modem technology iscommercially available from Cirrus Logic as model numberCL-MD9624ECP/MD1414ECP, the details of which are hereby incorporated byreference. The modem design is not critical to the invention, and the PCcard modems available any one of numerous manufacturers will suffice.For example, modems from Advance Circuits, Inc. of Minnetonka, Minn.,AMT International Industries, Inc. of Huntington Beach, Calif. or any ofthe other manufacturers of PC card modems listed in the PCMCIA ReferenceBook of Spring 1994 (hereby incorporated by reference) will suffice. Thedetails of these modems are hereby incorporated by reference. The modem450 can be included within the circuits of FIGS. 3 or 8 as well inalternative embodiments as can headphone interface 454. In addition,modem 450 can be a cellular modem of any of the types which arecurrently commercially available from the sources listed in the PCMCIAResource Reference Book of Spring 1994. The details of these cellularmodems is hereby incorporated by reference.

[0167] In addition, a headphone interface 454 coupled to a headset 456or headset jack provides audible feedback signals to the user for suchevents as successful decode tones, dial tone received by the modem 450,DTMF dialing tones, ringing sounds, answering modem tones or carrierdetected by modem 450. The modem outputs audio signals to the headphoneinterface 454 via line 458. The headphone interface is also connected toa pin in the parallel output port of the microprocessor 38 by line 464to receive a signal indicating either a successful decode or a bad read.Typically, the microprocessor 38 will change the logic state of the line458 at a first audible frequency rate upon achieving a successful decodeand will change the logic state of line 464 at a second audiblefrequency rate upon detection of a bad read. The headphone interface 454provides buffering and amplification for the signals on lines 464 and458 and applies the amplified signals to the headset 456 via line 460.

[0168] Referring to FIG. 22, there is shown a block diagram of anotherembodiment of the invention. The embodiment of FIG. 22 symbolizes aclass of embodiments where decoded or undecoded data (preferablyundecoded) from a barcode scanning device is received by an interfacecircuit on a PCMCIA form factor PC card, the interface circuit includingmemory and nonvolatile memory (preferably flash EPROM), the interfacefor decoding the data and making the decoded data available to anyapplication running on a host computer having a PCMCIA slot and thememory on the PC card. In a subset of species within this genus, theinterface circuit on the PC card also makes the PC card memory availableto the host computer and makes the decoded barcode data available to thememory on the PC card. This allows barcode scanning devices to beplugged into host computers and have their data sent to the host over aparallel format, open systems bus rather than through a serial port andit also allows scanning all day using a PDA such as in doing inventoryand then placing the PC card into a host computer with a PCMCIA slot atthe end of the day and rapidly downloading the scanned data into thehost through the PCMCIA bus. The architecture of embodiments representedby FIG. 22 is faster, cheaper, more maintainable and more flexible thancustom designed portable barcode scanning computers. When the hostbreaks or becomes obsolete, it can be replaced with a new host.Likewise, when the barcode scanning device breaks or becomes obsolete,it can be quickly replaced with a new one without the need to design anew interface or write new code. Further, when new host PDA's becomeavailable with more built-in features, such as built in cellular modemsor ethernet interfaces, those features can be used to advantage by thebarcode scanning PC card.

[0169] Preferably, the amount of nonvolatile memory on the PC card willbe sufficient to store a whole day's worth of scan data which can thenbe downloaded at the end of the day onto another host with a PCMCIA slotby removing the PC card from its portable host computer and placing thePCMCIA card into the PCMCIA slot of a desktop host/mainframe etc. Thepreferred functionality of the PC card will include hardware andsoftware on the PC card which can decode undecoded barcode scanning dataand store the resulting alphanumeric characters either in any memory ofthe host computer including the keyboard buffer or the memory on the PCcard or both.

[0170] In FIG. 22, a Personal Digital Assistant or other host computer500 has a PCMCIA slot 502 which has a connector therein. The connectoris circuitry and software of the host computer that implements thePCMCIA interface described in FIG. 5 and the PCMCIA specificationsincorporated by reference herein. The details of the software layers104, 106, 110 and the hardware interface 115 are known to those skilledin the art and are industry standard as are the interface between thevarious layers. Together, these software drivers and socket hardwareimplement a PCMCIA bus the conductors of which are the pins of theconnector-in PCMCIA slot 502.

[0171] A PC card 504 slips into the PCMCIA slot 502. The PC card has aPCMCIA connector and PCMCIA interface circuit 506 which mates with thePCMCIA connector in slot 502. The PCMCIA bus is coupled to a decoder 508which is usually a programmed microprocessor but which could also be acustom integrated circuit or any other type circuitry capable ofdecoding undecoded signals received from an input device 510. The inputdevice can be any type device which outputs electrical signals whichencode alphanumeric information. The electrical signals can be generatedin any way and represent alphanumeric characters in any form of codingof, for example, contrasting areas of an image such as a barcode, twodimensional barcodes such as the codes referred to as PDF-417 or Code49K or MICR images, OCR output, keyboard codes, magnetic transitions ona magnetic strip etc. Examples of such an input device 510 are anundecoded type electrooptical and/or magnetic or mechanical type inputdevice, or, preferably, an undecoded barcode scan engine 510.Specifically excluded from the type of input devices having interfacesthat fall within the scope of the invention are Ethernet™ or other LANinterface circuits, modems, cellular phones or cellular modems and anyother input device for which PCMCIA card interface circuitry currentlyexists in the prior art. Hereafter, the “input device” 510 may bereferred to as a barcode scan engine or scan engine, but those skilledin the art will appreciate that such references either in thespecification or the claims refer to any type of input device whichoutputs signals which are either digital in nature and need decodingeither in the host computer or the PC card, or are analog in nature andneed to be sampled and converted to digital data and then decoded eitherby the host computer or the PC card and for which a PCMCIA PC cardinterface does not already exist.

[0172] In FIG. 22, the input device 510 is coupled to an input port 512on the PC card 504 but could also be integrated on the PC cardphysically. The input port 512 can be any form of input interfacecircuit that receives electrical signals in whatever form they areoutput by the input device 510 and converts them to whatever form isused by a decoder 508. The terms input port or input interface circuitas used herein or in the appended claims refer to just such a circuit.The PC cards described herein having an interface circuit for gettingalphanumeric characters decoded from signals generated by a barcode scanengine or for getting digital samples of undecoded barcode scan engineoutput signals into a host computer through the PCMCIA slot of the hostor for getting alphanumeric characters output by the barcode scan engineinto the host computer through the PCMCIA slot, are sometimes referredto in the claims appended hereto as PC card form factor interfaces tobarcode scan engines.

[0173] In embodiments where the input device 510 is integrated on the PCcard or physically mounted to the PC card, the input port, as that termis used in the claims appended hereto, means the conductor(s) of thedata path that couples the electrical signals from the input deviceeither to the decoder circuit or the PCMCIA adapter chip/interfacecircuit for coupling to the host computer 500.

[0174] The PC card also contains auxiliary memory which is used to storedecoded alphanumeric data from the decoder 508 prior to delivery to thehost computer 500 and which may also be used by the host computer toaugment its internal memory to provide additional storage. Inalternative species of the genus of embodiments represented by FIG. 22,one or all of the auxiliary memory 514, the PCMCIA interface circuit 506and the input port 512 can be integrated into the integrated circuitthat is currently depicted as decoder 508.

[0175] Referring to FIG. 23, there is shown a block diagram of anembodiment of the invention that uses a serial port PC card to importundecoded barcode scanning engine or other input device output signalsinto a host computer for decoding on the host. In this embodiment, theundecoded output signal of the barcode scanning engine 510 is coupled bysignal line 511 to the status pin of serial port 512 on the PC card 505.The PC card can be any serial card, but preferably is a serial card witha buffer 514 that can store the undecoded data from the barcode scanningengine or other input device temporarily until the host has a chance toaccess the serial card and download the data for decoding. Memory 514can also be used as external memory for the host through the PCMCIAconnector without blocking access to the other circuitry on the PC card,in the manner described below in connection with the description ofFIGS. 29A, 29B and 29C. The serial port PC card can run as either amemory card or I/O mapped and can be either interrupt driven or polledand is adaptable to any PCMCIA compatible host computer. Preferably, theserial card has the capability of taking a TTL level output signal online 511 that transitions between logic 1 and logic 0 and place it on apin of the PCMCIA bus connector 502 which is polled by the host computer500 periodically. The host records the logic state at each sample timein a buffer on the host and uses the digital samples derived thereby todecode the alphanumeric characters that are encoded in the samples.

[0176] The serial port PC card functions to receive and temporarilystore data that is bound for the host computer and to cooperate with thehost computer either by an interrupt or polling based scheme to get thestored data into the host for decoding.

[0177] The host computer has a microprocessor 516 which is controlled byknown decode software 518 to access the data from the serial card 505and decode it. The details of the decode software 518 are not criticalto the invention, and any known decode software will suffice as block518 in FIG. 23 for controlling processing of the microprocessor 516 inthe host computer. However, software of the class exemplified by theflow chart of FIGS. 6A through 6C represents one example of typicaldetails of processing of undecoded barcode signals into alphanumericcharacters.

[0178] Of course, the use of a full fledged serial card is not necessaryin the embodiment of FIG. 23 since RS232 protocol serial communicationis not occurring. In an alternative embodiment then, the serial port PCcard 505 in FIG. 23 is a custom designed serial communication card whichis optimized to handle communications on only one or two (possibly more)serial data lines between the card and the scan engine, one to receive aserial format signal from the scan engine and another, perhaps, to carrya power control signal to the scan engine to start and stop scanningthereby.

[0179] An example of a more specialized barcode interface in the PC cardform factor where decoding is done on the PDA or host 500 is shown inFIG. 24. As in the case of FIG. 23, the PDA contains a microprocessor516 processing of which is controlled by decode software 519. The decodesoftware 519 is adapted receive data from a PCMCIA adapter chip 522 onthe PC card and decode it. The decode software also includes, in someembodiments, interrupt service routines to receive interrupts from theadapter chip indicating data is ready to be sent to the PDA and forcontrolling the microprocessor to access the data and store it in amemory of the PDA or host for decoding. The decode software may alsoinclude, in some embodiments, routines to write data to an EEPROM memory524 on the PC card to conFigure the PCMCIA adapter chip. Alternatively,the EEPROM can be used by the host for any purpose.

[0180] In the embodiment shown on FIG. 24, the PC card 520 consists of aPCMCIA adapter chip 522, an EEPROM configuration memory 524 and possiblya level shifting or buffering circuit 526. The adapter chip 522functions to manage the interface to the PDA or host through the PCMCIAsocket 528. The PCMCIA socket 528 is intended to represent all thesoftware layers and PCMCIA hardware interface resident on the host anddescribed with reference to FIG. 5. A typical example of the type ofadapter chip that could be used is the Z86017 adapter chip which iscommercially available from Zilog Inc. of 1355 Dell Avenue, Campbell,Calif. Phone (408) 370-8000.

[0181] The function of the configuration memory 524 is to storeconfiguration data which sets up the adapter chip to function in themanner needed to import data from an undecoded barcode scan engine andget it into the host computer 500. The PCMCIA interface has manydifferent modes and peculiarities defined in the PCMCIA specificationsincorporated by reference herein. Therefore, typical PCMCIA adapterchips have a host of different features to be compatible with the PCMCIAinterface only some of which are needed to interface to a barcode scanengine. The configuration memory stores configuration data that turns onthe features of the adapter chip that are needed and defines how theadapter chip is to operate.

[0182] The function of the level shifter/buffer circuit 526 is to makeany necessary adjustments in voltage levels needed to interface theundecoded signals arriving on input line 530 at input port 532. Thebuffer circuit 526 optionally may also serve to isolate the adapter chipfrom any possibly damaging voltages that might be placed on line 530accidently.

[0183] Referring to FIG. 25, there is shown a block diagram of thepreferred embodiment of practicing the invention. In this embodiment,the PDA or host 500 does not do the decoding of the signals from thescan engine 510. Instead, the decoding is performed by a commerciallyavailable barcode decoding integrated circuit on the PC card. The PCcard 534 in the embodiment of FIG. 25 is comprised of a PCMCIA adapterchip 536 that handles the interface with the PCMCIA socket 528, a“hardwired” barcode decoder chip 538 and a memory 540. In someembodiments, the memory 540 supports the operation of the decoder chip538 as symbolized by bus 539. The memory 540 also provides externalstorage for the PCMCIA adapter chip 536 and/or the host computer 500, assymbolized by bus 543. In the preferred embodiment, the memory 540 isapproximately two megabytes of nonvolatile flash EEPROM. In thepreferred embodiment, the barcode scan engine 510 is integrated into orphysically attached to the PC card in such a way that when the PC cardis inserted in the PCMCIA socket, the barcode scan engine extends beyondthe PCMCIA slot and is mechanically supported by the PC card'sengagement with the PCMCIA slot. This allows one-hand scanning ofbarcodes by moving the PDA such that the scan engine's laser beam orwand optical port passes over the barcode to be scanned within thescanning range of the particular scan engine selected. The scan enginecan be laser based, a charge coupled device or a wand. Further, the scanengine can be connected to the PC card by a cable in some embodimentsrather than integrated on the PC card as symbolized by dashed line 541.

[0184] The undecoded signals from the scan engine 510 are input to thedecoder chip 538 where they are decoded into alphanumeric characters.The decoder chip 538 is typically a microcontroller with barcodedecoding routines hardcoded into internal ROM. One example of suchcommercially available chips is the HP 2312 series available fromHewlett-Packard of Palo Alto, Calif. the details of which are herebyincorporated by reference. The decoded characters are stored in memory540 until the PCMCIA adapter chip 536 retrieves the data from thememory. Block 542 represents any necessary interface circuitry to couplethe PCMCIA adapter chip to the decoder chip. In the preferredembodiment, it is an 8-bit parallel interface chip. The adapter chipthen generates an interrupt to the PDA or host to tell it thatcharacters are ready to for retrieval by the PDA. In the preferredembodiment, the interrupt to the host passes to the host a pointer tothe location on the PC card where the character or message is stored,and if more than one character is stored, the interrupt may also passlength information indicating how many characters are stored. A program517 in the host 500 then executes an interrupt service routine andperform either an I/O or memory cycle with the PC card to retrieve thedecoded alphanumeric character. In the preferred embodiment, thecharacter or message thus retrieved is placed in the keyboard buffer ofthe host. In alternative embodiments, the retrieved characters can bestored elsewhere in memory of the host for use by any applicationprogram.

[0185] Referring to FIG. 26, there is shown a block diagram of anotherspecies of the preferred embodiment where decoding of undecoded barcodescan engine data is done on a PC card. In this embodiment, the undecodedbarcode scan engine data can be received from either an undecoded scanengine 510 which is integrated on the PC card or through a serial portsuch as an RS232 connector which may be connected to any type of decodedbarcode scan engine or other type of input device such as a magneticstripe reader, OCR device, etc. which outputs alphanumeric characters orother data which can be used as input by the PDA or host such askeyboard scan codes that the PDA or host receives and stores in akeyboard buffer.

[0186] The embodiment of FIG. 26 uses a PCMCIA adapter chip 536 which ispreferably a Zilog Z86017, and a decoder chip 538 which is preferably anHP 2312 from Hewlett Packard. The decoder chip received undecodedbarcode scan data on line 560 from the scan engine and decodes it intoalphanumeric characters. The decoded characters can be output to theadapter chip 536 in either parallel format through a parallel 8-bitbuffer/latch 562 or serially through data path 564 and UART 566. TheUART is also coupled by data path 568 to serial port 544. In alternativeembodiments, the UART 566 could be eliminated and only parallel datatransfer used or the parallel buffer/latch 562 could be eliminated andonly serial data transfer used.

[0187] The PC card also includes nonvolatile memory 570 that is coupledto the adapter chip 536 via data path 572 which is available for use bythe host for any purpose. In some embodiments, the nonvolatile memorywill also be accessible to the decoder 538. In the preferred embodiment,memory 570 is Intel flash EEPROM because of its dependablenonvolatility. However, in other embodiments, the nonvolatile memory 570could also be battery backed up static RAM or battery backed up dynamicRAM.

[0188] In the embodiment of FIG. 26, the adapter chip receives aninterrupt from the decoder chip 538 via line 573 each time an characterhas been decoded and is ready for pickup. The adapter chip 536 thenpicks up the character and generates an IRQ interrupt to the host online 574. A program 519 stored on the host computer controls operationsof a microprocessor 516 in the host 500 to execute an interrupt serviceroutine to retrieve the character from the adapter chip and place it inthe keyboard buffer of the host. An exemplary program to perform thefunction of program block 519 is included herewith at Appendix A. Thisprogram is written in C++ and can be ported to any host with a suitablecompiler. Alternatively, the program 519 could transmit the character toanother application running on a multitasking host computer. Inalternative embodiments, the program 519 can control the microprocessorto move the decoded character or message from the adapter chip 536 intothe memory space shared between the PC card and the host.

[0189] In the embodiment shown in FIG. 26 using the program of AppendixA, the nonvolatile memory 570 is available for use by the host 500 asexternal memory after the host is rebooted. In such a case, no decodedbarcode data can be input to the host. The current state of PCMCIAsocket implementations on host computers do not reliably supportmultifunction PC cards. The only type PC cards that are broadlysupported by a wide range of host computers are certain type of flashmemory cards, and modem cards or LAN interface cards. Most non-PDA hostswith PCMCIA slots do fully implement the various software and hardwarelayers discussed in FIG. 5, however many PDAs do not fully implement allthe software layers discussed in FIG. 5. This can cause problems withoperability of multifunction PC cards or PC cards other than flashmemory cards, modem cards or LAN interface cards. The problem withmultifunction cards that include flash memory along with otherfunctionality such as the barcode decoding circuitry of the embodimentof FIG. 26 is that when the flash memory driver of the host 500 takescontrol of the PCMCIA socket for access to the memory, that precludesother driver software on the host 500 from using the PCMCIA socket toaccess the other functionality on the PC card. Most hosts with PCMCIAsockets come equipped with drivers that execute at boot time and lookfor PC cards present in the PCMCIA slot, and if they find one, they tryto determine what type of card it is and then take over the PCMCIAsocket and carry out operations with the PC card. These drivers suppliedby the host manufacturer will find flash memory on the PC card 580 inFIG. 26 and will block all access through the PCMCIA socket to thedecoded data from the barcode decoding chip. Therefore, it is necessaryin the embodiment symbolized by FIG. 26 to disable these drivers and usea custom written driver for controlling PCMCIA socket 528 which willaccept the decoded alphanumeric data from the decoder chip 538. In oneembodiment where a DOS based host was used, the standard drivers thatcame with the host were disabled by commenting them out in theconfig.sys file. In other types of hosts, similar steps should be takento prevent blocking of the PCMCIA slot by the standard PCMCIA drivers.The custom driver that is used in these embodiments is attached heretoas Appendix A. This driver will still not provide access by the PDA tothe flash memory 570 in addition to access to the decoded alphanumericdata unless the host is rebooted, but in other embodiments a differentcustom driver 519 will provide access to both the nonvolatile memory 570as well as the decoded alphanumeric data from the decoder chip 538without rebooting. In some embodiments, this difficulty can beeliminated by eliminating the flash memory, but in the preferredembodiment the flash memory is present because most PDA's and palmtopsare severely limited in onboard memory which limits their usefulness.

[0190] Referring to FIG. 27, there is shown a flowchart of a typicalprocess that occurs in scanning barcode data using a host computerhaving a PCMCIA slot with a PC card having the architecture of eitherFIGS. 25 or 26. Block 600 represents the process of “booting” the hostcomputer which happens when power is first applied or a reset is given.Block 602 represents the process whereby the PCMCIA socket softwaresupplied by the manufacturer of the host executes (other than a flashmemory driver or other driver supplied by the manufacturer of the hostwhich would block access to the barcode scan engine interface PC card),looks for a PCMCIA socket, finds one and attempts to manage the socket.Block 604 represents the process of installing the driver software forthe barcode scan engine interface PC card. Typically this is done atboot time as part of the boot process or subsequently in execution of aterminate and stay resident process. The driver software installed isspecifically designed to interface between the operating system of thehost and any application programs that require barcode data and theparticular circuitry on the PC card. Any driver software that canperform this interface function to receive commands from the operatingsystem and/or application program dealing with configuring, retrievingdata from or sending data to the PC card and passing decoded barcodedata to the application program and/or operating system will suffice forpurposes of practicing the invention. In some important alternativeembodiments, the driver software will also serve to interface the hostoperating system and/or application programs to the nonvolatile memoryon the PC card for use as expansion memory.

[0191] Block 606 represents the process wherein the host receives acommand from a user to run an application program that requires datasuch as barcode data. This application program however can be anyprogram that uses keyboard data because in the preferred embodiment, thedriver for the barcode scan engine interface PC card places the decodeddata from the scanned barcode into the keyboard buffer of the host.Therefore, the application started in step 606 can be a spreadsheet,word processor etc.

[0192] Block 608 represents the process whereby the host receives acommand to scan a barcode. This can be through a command entered to theapplication program from the keyboard, by light pen or any other form ofinput and can also be a command entered directly to the operating systemof the host through the routines that scan the keyboard, mouse,trackball, touch screen etc. for input data from the user. This startscan command is passed to the driver for the PC card which then sendsthe appropriate signal to the PC card that scanning of a barcode isdesired, as symbolized by block 610.

[0193] Block 612 represents the process of the barcode decoder chip 538in FIGS. 25 and 26 detecting the receipt of this start scan command andsending an appropriate signal to the scan engine to either startscanning or apply power thereto and start scanning.

[0194] At this point, as soon as a barcode is brought within the rangeof the scan engine, barcode scanning signals will begin to appear on bus560 in the form of transitions between different voltage levels as thelight and dark patterns of the barcode are sensed by the scan engine.The decoder chip 538 senses these transitions and does with themwhatever it is programmed to do internally by the program storedtherein. Typically these transitions are sampled or otherwise processedto determine the relative spacings between the transitions and thisspacing information is used in determining what type of barcode wasscanned, the direction of scan and in decoding the barcode to generateone or more alphanumeric characters such as ASCII or EBCDIC. Thisprocess is represented by blocks 614 and 616.

[0195] After at least one alphanumeric character has been decoded, thePC card sends an interrupt to the host computer as symbolized by block618. Typically, this is done by the decoder chip 538 activating the IRQinterrupt line 573 to the PCMCIA adapter chip 536 which then activatesthe IRQ interrupt line 574 coupled across the PCMCIA bus to the hostPCMCIA connector. Block 620 represents the process carried out by theinterrupt service routine that handles interrupts from the PC card toretrieve the alphanumeric character from the PC card and does with thecharacter whatever is appropriate. In some embodiments, the retrievedcharacter will be passed to the application program started in block606. In other embodiments, the retrieved character will be stored in thekeyboard buffer for use by the application started in block 606. Instill other embodiments, the retrieved character will be written to thenonvolatile memory on the PC card for portability to another hostcomputer. Alternatively, the interrupt service routine can store all theretrieved characters as they are retrieved either one by one or as awhole message in memory of the host for later batch processing by anapplication program on that host.

[0196] In some embodiments, the process of FIG. 27 is modified as shownin FIG. 28. FIG. 28 represents a class of embodiments wherein thedecoded data from a complete session of barcode scanning of one or morebarcodes is stored in the nonvolatile memory on the PC card before aninterrupt is generated to the host computer, i.e., an interrupt is notgenerated for each successful decoding operation. All blocks in FIG. 28having reference numbers used in FIG. 27 have the same function. Thedifference starts at block 619 which represents the process of storingthe decoded alphanumeric characters from the decoding of one or morebarcodes in the nonvolatile memory on the PC card. Typically, thenonvolatile memory has enough capacity to store an entire day's worth ofdecoded characters from barcode scanning therein without overflow.

[0197] In one embodiment, after scanning, decoding and storage of allthe alphanumeric characters in the nonvolatile memory is complete, asignal is generated by the PC card indicating that there is data readyfor transfer to the host computer. This can be done either by generatingan interrupt and sending it to the host, or by setting a flag in someregister in the PC card in the shared memory space or I/O space of thehost. In the case of use of an interrupt, this interrupt can begenerated by the PC card upon receipt of a “finished scanning signal”from the user indicating that all intended scanning has been completed.This signal can be entered in any way such as by a timeout of a softwaretimer on the host which is reset by the decoder chip and PCMCIA adaptereach time a successful decoding operation has been completed, etc. Thedetails of how this signal is entered are not critical. After thefinished scanning signal is received, an interrupt is sent by the PCcard to the host. In the case where a flag is set by the PC card whenscanning has been completed such as when no transitions have beendetected on the signal line from the barcode scanning engine after apredetermined period. The process of setting this signal is representedby block 621.

[0198] In alternative embodiments, block 621 can represent the processof receiving a signal entered by the user through some input means onthe host computer such as a command to the barcode applicationindicating that scanning is complete. Before that command is given, alldecoded data is stored in the nonvolatile memory. The barcodeapplication can then access the data and store it in memory of the hostin some applications or use the data, or store it in the keyboard bufferor some predetermined memory location for use by another application orwrite the data out to the nonvolatile memory on the PC card, all assymbolized by block 623.

[0199] There follows a more detailed discussion of the details of acustom driver that can interface a barcode scan engine interface PC cardhaving onboard flash memory with a host computer. This driver performsmany of the functions of the flow charts of FIGS. 27 and 28.

[0200] The PCMCIA specifications did not originally contemplatemultifunction cards. PC cards were envisioned as providing extra memory,or a modem etc. or providing some other single function, but were notexpected to provide both a function plus additional memory. Therefore,the interface tools necessary to implement such an interface are notpresent and a driver must be designed which can utilize both thenonvolatile memory and the barcode decoder chip utilizing the tools thatare currently available in the PCMCIA interface. In one embodiment ofsuch a driver, the nonvolatile memory 570 is mapped into the sharedmemory space (zone 1 in FIG. 4) and the registers in the PCMCIA adapterchip 536 are mapped into the shared I/O space (zone 3 in FIG. 4). Theproblem is how to design a driver for execution on the host which canfind out where in the I/O space the registers of the PC card are locatedand what interrupt number has been assigned to the barcode scan engineinterface PC card (hereafter referred to as the barcode card) each timethe barcode card is inserted into the PCMCIA socket of the host. This isnot as simple a task as one might think since the driver cannot talkdirectly to the memory technology driver software layer (hereafter MTD)104 in FIG. 5. It is the MTD 104 which knows where in the I/O space thebarcode card's registers are located and what interrupt number has beenassigned to the barcode card. These assets are allocated to the barcodecard by the Card Services software layer (hereafter CS) 106 in FIG. 5when the barcode card was first placed in the PCMCIA socket of the host.When the barcode card is inserted, the MTD layer interrogates the CSlayer to determine the interrupt assigned by CS to the barcode card andthe base address in the I/O space of the first register in the set ofI/O registers on the barcode card (usually these registers are internalregisters of the adapter chip 536). These two pieces of information arethen stored by the MTD in some memory for later use in informing thebarcode card driver indirectly through the CS layer.

[0201] Referring to FIG. 29, comprised of FIGS. 29A through 29C, thereis shown a flow chart of the process that allows the barcode driver toretrieve decoded barcode data from registers on the barcode card usingI/O cycles. This flowchart details the process that goes on in theclient application that needs barcode data, the barcode driver, the CSand MTD layers and on the barcode card to get the adapter chip'sregisters mapped into the zone 3 I/O space when the barcode card isfirst inserted into the host and to cooperate in an I/O cycle. Block 630represents the process that happens in block 606 of FIGS. 27 and 28 whenthe client application that needs barcode data launches. As part of thisprocess, the client application registers with the CS layer and leaves acallback address. Why this is done is explained below. For convenience,assume that the client application is represented by process 92 in FIG.5. Block 632 represents insertion of the barcode card into the PCMCIAsocket of the host computer 500. This can happen either before or afterthe client application launches.

[0202] Block 634 represents the process performed by the Card Serviceslayer 106 in FIG. 5 of assigning to the barcode card an interrupt numberand space in the zone 3 I/O space for the barcode card's registers. TheMTD must determine the base address of the barcode cards registers andthe interrupt number assigned, so it interrogates the CS layer to getthese data items and stores them in some memory assigned to the MTDlayer. The client application 92 (hereafter the client) needs to knowthe two items of data just stored by the MTD to be able to receivedecoded barcode data from the barcode card, but the client cannot justask the MTD layer for this data because of the PCMCIA softwarearchitecture.

[0203] Therefore, to get the barcode card's interrupt number and thebase address of its registers, the client has to obtain this informationindirectly by interrogation of the CS layer. This done by using softwareinterrupts. In DOS machines, there are hardware interrupts where acircuit activates an interrupt line and software interrupts where aclient application executes an interrupt instruction. In the case of ahardware interrupt, an interrupt controller chip in the host places theinterrupt number on the host bus in response to an interrupt acknowledgecycle on the host bus after the interrupt line is activated. Theoperating system reads this interrupt number and uses it as an indexinto an interrupt vector table which contains the address of anappropriate interrupt service routine for each specific interrupt. Inthe case of a software interrupt, the interrupt instruction contains theinterrupt number index into the interrupt vector table. Softwareinterrupts are how client applications communicate with the operatingsystem in DOS machines. The CS layer is like an extension of theoperating system and is assigned to interrupt number 26.

[0204] To interrogate the CS layer to get the base address in the I/Ospace of the barcode card registers and what interrupt number has beenassigned to the barcode card, the client application executes a softwareinterrupt instruction passing interrupt number 26 to the operatingsystem. This causes the host to save its current state on a pushdownstack and vectors processing to an interrupt service routine in theclient which invokes a particular function which is part of the CSapplication programmer's interface (hereafter API). The CS API makesthree functions available to its clients: Get First Client; Get NextClient; and Get Client Info. Each process must register with CS eachtime it launches if it wants to avail it of these services and toreceive information from CS such as messages that a new PCMCIA card hasjust been inserted into the host PCMCIA slot. When a client applicationprocess registers with CS, it leaves a callback address in whichmessages to it from the CS layer are stored. The callback address isfrequently polled by the client for messages from CS.

[0205] Block 638 represents the process of starting the interrogationprocess of CS by the client. This process is implemented in oneembodiment by execution of a software interrupt and storing in apredetermined location in memory a Get First Client call to the CS APIand the identity of the client making the request or the callbackaddress in which the requested data is to be stored. The softwareinterrupt causes processing to be vectored to the interrupt serviceroutine of CS which then executes and looks in the predeterminedlocation in memory and reads the Get First Client call and the identityof the client making the request. The CS layer then stores the identityof the first client process in the callback address of the client thatmade the request as symbolized by block 640. Those skilled in the artwill appreciate other interprocess communication mechanisms that can beused to carry out this interrogation process and other transfers of databetween different software processes. For example, differentinterprocess communication mechanisms with Unix, Macintosh or otheroperating systems may also be used. Each of these other forms ofcommunication between processes is equivalent to the process describedabove.

[0206] Next, in block 642, the barcode client application 92 invokes theGet Client Info function of the CS API identifying the first registeredclient identified in block 640 and passes a predetermined argumentnumber (to be explained below). Whether this is done by another softwareinterrupt or some other interprocess communication mechanism is notcritical to the invention. The CS layer passes this Get Client Inforequest to the first registered client via the first registered client'scallback address, as symbolized by block 644.

[0207] The Get Client Info function has a predetermined number ofsubfunctions identified by numbers from 128 to 255. One of thesesubfunction numbers (also called arguments) is reserved for the MTDlayers in apparats and processes implementing the teachings of theinvention. For the sake of example, assume argument 255 is reserved forthe purpose of identifying the MTD layer and passing the informationsought by the barcode client application, so the barcode client wouldmake a call Get Client Info (255) to the CS. When the barcode clientinvokes the Get Client Info function for the first registered client,argument 255 is passed with the Get Client Info call. If the firstregistered client is not the MTD layer, it will either not understandthe subfunction 255 call and return an error, or it will understand itas a call for different data than the barcode client application islooking for and returns some data which means nothing to the barcodeclient as symbolized by block 644. The returned data from the firstregistered client is received by the CS layer and sent to the barcodeclients callback address, as symbolized by block 646.

[0208] This nonmeaningful data returned by the first registered clientin response to receipt of argument 255 tells the barcode client that thefirst registered client is not the MTD layer as symbolized by block 648.The barcode client looks at the returned data using a firstpredetermined offset to determine if the MTD layer signature is presentthere. The MTD layer has two predetermined offsets that are known to thebarcode client application. If the first registered client had been theMTD layer, the data returned by the MTD in response to receipt of GetClient Info (255) would have contained unique data called a signature atthe first offset identifying this client as the MTD layer, and wouldhave contained at the second predetermined offset the base address inthe shared I/O space of the registers in the barcode card used fortransferring decoded data and the interrupt number assigned to thebarcode card. The packet of data returned to CS by the clientapplication in response to the Get Client Info (255) call is sent by CSto the callback address of the barcode client.

[0209] If the first registered client is not the MTD, the barcode clientinvokes the Get Next Client function of the CS layer, as symbolized bythe test of block 650 and the process of block 652. After the nextclient ID is returned to the barcode client, the Get Client Info (255)call is made again for that client, all as symbolized by block 652. Thereturned data in response to this call is then examined for the MTDsignature in the process represented by block 650. This process ofchecking all registered clients with CS is continued until the MTDclient is found.

[0210] After the MTD client is found, the barcode client executes theprocess represented by block 654. This process reads the returned datafrom MTD in response to the Get Client Info (255) call. The datareturned is read at the second predetermined offset known to both thebarcode client and the MTD to obtain the interrupt number assigned tothe barcode card and the base address in the I/O space for the barcodecard registers used to transfer the decoded data. This data was assignedby CS to the barcode card for this particular session.

[0211] The process of block 656 represents the process of the barcodeclient executing a software interrupt appropriate to passing theinterrupt number assigned to the barcode card to the operating system.This interrupt causes the operating system to execute an interruptservice routine that retrieves the interrupt number assigned to thebarcode card and the start address of the interrupt service routine thatprocesses interrupts from the barcode card to pass decoded data to thehost. The operating system then stores this interrupt number and serviceroutine address in the interrupt vector table.

[0212] Blocks 658 and 660 represent the process carried out by theinterrupt service routine for the barcode card in retrieving decodeddata after an interrupt is received from the barcode card. When thePCMCIA adapter chip 536 activates the IRQ interrupt request line, theinterrupt controller chip in the host places the interrupt numberassigned to the barcode card on the host bus in response to the host businterrupt acknowledge cycle. The operating system then uses this numberas an index for entry into the interrupt vector table to retrieve thestart address of the appropriate interrupt service routine for thebarcode card in the barcode card driver. Processing is then vectored tothis service routine which executes and conducts an I/O cycle with thebarcode card to retrieve whatever decoded data is stored in the barcodecard's registers.

[0213] Optional blocks 662, 664, 666, and 668 represent the most usefulpossibilities for what the interrupt service routine for the barcodecard does with the retrieved decoded data. In block 662, the decodeddata would be passed to the barcode client for immediate use. If theinterrupt service routine is part of the barcode client, this simplyamounts to storing the data in a predetermined location known to theroutine that needs the data or passing a message to that routine wherethe retrieved data can be found in the memory of the host. Whereinterrupt routine is not part of the barcode client, the data is passedto the barcode client by any suitable interprocess data transfermechanism. Block 664 represents the process of storing the retrieveddata in the keyboard buffer of the host computer for use by anyapplication that takes data from the keyboard buffer. Block 666represents the process of storing the retrieved data in a buffer in themain memory of the host. Such a buffer could be FIFO if the order ofscanned data is important, a circular buffer, a LIFO buffer etc. Block668 represents the process of storing the retrieved data in thenonvolatile memory of the barcode card for transport to another host orlater use by the host that stored the data. Data storage into thenonvolatile memory is conducted by conventional memory cycles carriedout with whatever type of nonvolatile memory is in use on the barcodecard.

[0214] Throughout the foregoing discussion, the barcode clientapplication 92 has been stated as the process which does theinterrogation of the CS layer and the process where the returned datafrom the registered clients is examined and processed. These are theessential functions of a driver for the barcode card, and, inalternative embodiments, a separate driver process to implement thisinterrogation and identification of the MTD client function. This driverwould obtain the interrupt number and base address data from the MTD andstore it for use by any barcode application that wanted it. Thisseparate driver embodiment uses an API to interface the driver to thebarcode client application. This software architecture is preferred fromthe standpoint of decoupling the barcode client applications from theneed for reprogramming when the details of the driver or card interfacechange as the PCMCIA standard evolves.

[0215] The above described processes have been detailed in the contextof how DOS hosts work. Those skilled in the art will-appreciate numerousmodifications or alternative ways of achieving the same results inMacintosh, Unix, IBM, DEC or other host platforms and operating systems.The particular details of how these functions are achieved are notcritical and other ways of achieving the same result are deemed to beequivalent and are intended to be included within the scope ofequivalents of the appended claims. In addition, references in thediscussion of FIGS. 1-21 of interrupts passing data are to be understoodas references to a process wherein when the barcode card interrupt isactivated, the interrupt service routine which executes accesses aparticular predetermined register, registers or one or morepredetermined memory locations on the barcode card to get theinformation “passed” with the interrupt.

[0216] The above described process of mapping the registers of thebarcode card into the I/O space of the host and assigning an interruptnumber to the barcode card must be accomplished each time the barcodecard is removed and re-inserted into the host PCMCIA socket. The processof FIG. 30 represents one exemplary process for achieving that end.Block 670 represents the process of the driver or barcode clientapplication 92 with driver embodied therein receiving a message from theCS layer that the barcode card has been removed from the PCMCIA slot.When this message is received, the interrupt number for the barcode cardin the interrupt vector table is no longer any good because CS probablywill not assign the same interrupt number to the barcode card the nexttime the card is inserted. Therefore, the barcode client must instructthe operating system to remove the current interrupt vector for thebarcode card stored in the interrupt vector table. Block 672 representsthis process where the barcode client executes a software interrupt tothe operating system and instructs it to remove the current interruptvector entry for the barcode card.

[0217] Block 674 represents the process of receiving a message from theCS layer that a new PC card has been inserted into the PCMCIA slot ofthe host. The CS layer sends this message to all registered clientswhenever any new PC card has been inserted. This is the reason thebarcode client registered with the CS layer back in step 630 of FIG.29A. Each client application must then determine if the PC card insertedis the PC card that client application interfaces with. The barcodeclient must know therefore if the new PC card is the barcode card and,if so, must know the interrupt number assigned to the card and the baseaddress in the I/O space of the barcode card's registers. In order to dothis, the barcode client simply follows the same procedure previouslydescribed of interrogating the CS layer and getting information abouteach of its clients. The CS layer automatically registers the PC card asa client whenever a new PC card is inserted into the PCMCIA slot of thehost. Therefore, block 676 simply represents the process of vectoringprocessing back to step 638 on FIG. 29A where processing resumes aspreviously described.

[0218] The above described functions of the MTD layer make it clear thatthe MTD layer will be specially designed to interface with Card Servicesin the manner described above to identify itself to the barcode clientapplication 92 which contains a barcode card driver or to a separatebarcode driver. The MTD layer will also include-routines to interfacewith Card Services and to manage the barcode card so that the barcodeclient application can write data into the nonvolatile memory on the PCcard. These routines will include routines to export an applicationprogrammers interface (API) to Card Services. The CS layer then providesthis API to any driver or client application which needs to invoke thefunctions thereof to write data to the nonvolatile memory of the barcodecard. The MTD layer also serves to mask from the client applications andthe other layers of software the details of how reading and writing tothe particular nonvolatile memory on the barcode card is accomplished,all details thereof being implemented to the MTD layer. In other words,when a client barcode application or driver for the barcode card wantsto write data into the nonvolatile memory on the barcode card, it needonly invoke the write function of the API presented by Card Services andpresent the data and possibly an address in which to write the data. Inmost embodiments, the addresses where data is written into nonvolatilememory are supplied by the barcode client application, but in otherembodiments, data can be written into sequential addresses supplied bythe MTD or some other process. A mapping of these addresses to sequencenumbers can be used to translate the sequence number to an actualaddress. Thus, the barcode client application need only request a readof data item #3, and the MTD will map item #3 to the actual address toread and carry out the read transaction. Once the barcode clientapplication or separate barcode card driver invokes the write functionof the CS API, CS passes the message along to MTD, and the MTD layercarries out the write transaction by doing all the necessary steps tomake the write cycle happen for whatever type of nonvolatile memory ison the barcode card.

[0219] All the above described functions of providing an API to the CSlayer for allowing a client to access nonvolatile memory on a PC cardand providing the functionality to read and write to a nonvolatilememory on a PC card are part of the prior art. Numerous flash EEPROM PCcards are currently commercially available from numerous sources such asIntel Corporation, Advanced Micro Devices, Inc. etc., and the details ofthe how these cards and the MTD and CS layers and drivers on their hostswork are hereby incorporated by reference. Further, the PCMCIA CardServices Specification, Release 2.1 dated July 1993, at Section 3.6gives further details about interfacing to flash memory PC cards, andthis discussion is incorporated by reference. Therefore, only anabbreviated discussion of this functionality will be given in FIG. 31here for completeness.

[0220] Referring to FIG. 31, there is shown one embodiment of theprocess that goes on in the host and PC card when a client applicationwrites data to a nonvolatile memory on the barcode PC card. In thepreferred embodiment, the nonvolatile memory being written isapproximately 2 megabytes of Intel 28F008SA bytewide flash EEPROM, thedata sheet of which is hereby incorporated by reference. Block 680represents the process wherein the MTD layer provides to the CS layer anAPI for presentation to client applications for accessing thenonvolatile memory on the PC card. Block 682 represents the processcarried out by the CS layer in providing this API to clientapplications. Block 684 represents the process carried out by any clientapplication including the barcode client application in invoking thewrite function of the API. FIG. 31 shows the process for writing to aflash EEPROM nonvolatile memory, but the process symbolized by FIG. 31is similar if other types of nonvolatile memory are used. In addition,the process of reading the nonvolatile memory is similar. In a readprocess, block 684 represents invoking the read function of the API.Block 686 represents the process of the CS layer passing the request tothe MTD layer. Block 688 represents the process carried out by the MTDlayer in requesting the CS layer to cause the programming voltage to beapplied to the flash EEPROM on the PC card. This step is omitted whereother types of nonvolatile memory are used and in read transactions.Block 690 represents the process carried out by the MTD layer causingthe placing of the number 40 in the hexadecimal numbering system) ontothe flash memory data lines. This number is not the data to be written,but is a signal to the flash memory that the next data that appears onthe data lines is to be written into the memory. Block 692 representsthe process of placing the address where the data to be written is to bestored in the flash memory. Block 694 represents the process carried outby the MTD of carrying out another cycle with the flash memory whileleaving the address on the address lines what it was in step 692 butchanging the data placed on the flash memory data lines to the actualdata to be stored. Block 696 represents the process carried out by theMTD layer of blocking all further read or write transactions to theflash memory until the current write operation is complete. Writing toflash EEPROM is not instantaneous since the process requiresFowler-Nordheim tunneling of charge carriers into a floating gate afterthe programming voltage has been applied and this tunneling effect takessome time to accomplish. The MTD layer determines when the writeoperation has been completed in one of three different ways. The firstoption is for the MTD layer to block all further transactions for apredetermined interval during which the write operation is guaranteed bythe manufacturer to have been completed. The second option is for MTDlayer to write a 70 hex to any address. This causes the flash memory toreturn the contents of a status register on the data lines, one bit ofwhich indicates whether the write operation is completed or not. Thethird option is for the MTD layer to read the Ready/Busy line status.When this output line from the flash memory on the PC card is logic low,the flash memory is busy writing. Any one of these options is acceptablefor purposes of practicing the invention.

[0221] By using an MTD layer specifically designed for interfacing anyclient application to the nonvolatile memory on the barcode card throughthe PCMCIA slot without blocking client barcode applications access tothe barcode card decoding circuitry through the PCMCIA slot, certainadvantages are achieved. By providing such an MTD, the burden ofsupporting changes over time of an open system file format for datastorage in the nonvolatile memory is shifted to the programmers of theclient applications that desire to access the nonvolatile memory on thebarcode card. It also eliminates the need to devise a proprietary fileformat for file storage in the nonvolatile memory of the barcode cardand to support all client applications on numerous PDA and other hostswith PCMCIA slots that desire access to the nonvolatile memory. Bymerely providing the MTD layer that can provide access to thenonvolatile memory without blocking access to the barcode decodingcircuitry, there is decoupling between the software written by theapplicants and the burden of supporting numerous diverse clientapplications and hosts to support either migrations in an open systemsfile system standard or a proprietary file system standard. However, allof the following three options are within the teachings of the invention(each option includes provision of a barcode client application whichcan control the barcode card to start and stop scanning and unloaddecoded data): (1) use of a proprietary file system, as opposed to anopen file system standard such as the DOS file system, and then providefor every host platform at least a client that can read and write thenonvolatile memory on the barcode card as well as provide access forbarcode clients to the barcode card decoding circuitry; (2) use of aconventional file system and provision of a driver which incorporatesfunctionality to allow clients to read or write to the nonvolatilememory using the open file system as well as to access the barcodedecoding circuitry; (3) provide a custom MTD layer such as thatdisclosed herein which provides all clients access to the nonvolatilememory on the barcode card through the PCMCIA slot withoutsimultaneously blocking access to the barcode decoder circuitry on thebarcode card through the PCMCIA slot.

[0222] Referring to FIG. 32, there is shown a flowchart of theprocessing carried out by an alternative embodiment of a barcode clientroutine executed on the host computer for interfacing the host to thebarcode card using a terminate and stay resident routine or driver forreceiving interrupts. This alternative embodiments is designed for usewith decoded barcode scan engines that put out decoded data, i.e., noPCMCIA card is needed to do the decoding, and wherein the decoded datais input to the host/PDA through a status line of a serial port. Thereare four main modules in this alternative embodiment represented byblocks 700, 702, 704 and 706. Block 700 serves to define data to set upan API for the Card Services interface so that function calls to CardServices can be made by the barcode client application. Block 702 setsup Card Services for the barcode card by causing Card Services toallocate memory, input-output and interrupt resources to the barcodescan engine if necessary. Block 704 is shown as a terminate and stayresident routine, but it can also be a driver (the difference will beexplained below). The process represented by block 704 embodies aninterrupt service routine to accept interrupts from the barcode scanengine and deal with them. The interrupt service routine gets the serialformat data from the scan engine via a status line of a standard serialport such as an RS232 port and deposits the decoded data received fromthe barcode card in the keyboard buffer of the host computer. Inalternative embodiments, the decoded data retrieved from the serial portcan be deposited in any other memory or register of the host computer orin any other data storage device coupled to the host such asinternal/external memory such as a rotating magnetic media. The processof block 704 can also be performed by a driver as opposed to a terminateand stay resident routine. A driver is put into execution at boot timeby the config.sys file in DOS machines whereas a terminate and stayresident routine can be started under control of the user either througha keyboard command or a command in his or her autoexec.bat file. Block706 functions to take down the configuration of Card Services therebyallowing the memory, input-output and interrupt resources to bere-allocated to other uses.

[0223] Referring to FIG. 33, there is shown a block diagram of the flowof the program that programs the GAL logic configuration for a gatearray logic controller in the hardware embodiment described below. Aprogram similar to the flow chart shown on FIG. 33 is included herewithas Appendix C. The GAL or gate array logic serves to provide the Booleanlogical relationships between the various signals generated which areinput to and output from the decoder chip and the PCMCIA adapter chip.Block 708 represents the process of defining which pins of the GAL chipare assigned as the various functions (signals) that are to be logicallyrelated to each other by the GAL chip. Block 710 represents the processof programming the GAL with the Boolean logic relationships that definethe interrelationships between the functions assigned to the variouspins of the GAL in block 708.

[0224] Referring to FIG. 34, there is a shown a detailed flowchart of aninterrupt service routine which may be part of or which cooperates witha barcode client for receiving data from a barcode card and stores it ina keyboard buffer. A program written in assembly language for an Intel80×86 host processor is included herewith as Appendix A. Although theroutine of FIG. 34 is depicted as storing the data in the keyboardbuffer, it could just as easily store the data in RAM of the host or inany other data storage device of the host. Block 712 represents theprocess of receiving the interrupt which includes saving the machinestatus before starting the interrupt service routine. This is followedby the process of getting the character decoded by the barcode card, asrepresented by block 714. In block 716, an error check is performed todetermine if the character is valid. Typically this would be done bychecking an error status line from the PC card which will have a logicstate indicating whether or not an error has occurred. If there was anerror, block 716 represents the process of flushing the data that may beerroneous such as the sample data and any resulting decoded alphanumericdata from wherever this data is stored on the PC card. Because the PCcard receives data from the scan engine whenever a scan is performed butmay not have already offloaded the decoded data from the last successfuldecode operation if the host does not offload the data in time, it ispossible that data overrun can occur. Also, bad data can result from anyof the, reasons noted earlier herein in describing the decodingroutines. Therefore, if an error has occurred, the invalid data must beflushed. If there was no error, the status of the keyboard buffer ischecked to determine if it is full, as represented by block 718. Ofcourse, if some or the memory or other data storage device is being usedto store the retrieved characters where there is no danger of overflow,this step could be eliminated as can the process of block 720. Block 720represents the process of setting an error flag if the keyboard bufferis full. If the error flag is set for any reason, all the data from thescan is discarded and the barcode will have to be scanned and decodedagain.

[0225] If the keyboard buffer is not full, the retrieved character isstored in the keyboard buffer. In the case of another memory or datastorage device where there is no danger of overflow, the characterretrieved from the barcode card is stored in the memory. Block 724represents the process of acknowledging the interrupt and returning tothe calling routine.

[0226] Referring to FIG. 35, comprised of FIGS. 35A and 35B, there isshown a flowchart for an alternative barcode client application forinterfacing a host to a barcode card in the PCMCIA form factor using apolled architecture and not utilizing the custom memory technologydriver layer described earlier herein. A program written in C sourcecode and which is similar to the program outlined in FIG. 35 is includedherewith as Appendix A. The program represented by FIG. 35 requires thatany PCMCIA software supplied by the manufacturer of the host computerthat would block access to the barcode card through the PCMCIA slot bedisabled such as by commenting out any interfering calls to drivers thatwould so interfere.

[0227] The purpose of the barcode client application of FIGS. 35A and35B and Appendix A is to retrieve data from the HP 2312 barcode decoderchip on the PC card and to write configuration and control data to thedecoder chip, if necessary. The program starts out with a variety ofinclude statements that help define the interface to DOS (or some otheroperating system) as symbolized by block 726 and setting of names ofaddress constants in block 728. The address constants are offsets whereitems of information with predetermining meaning are to be placed. Block730 represents the process of defining the addresses of variousregisters in the barcode decoder chip on the barcode card and definingthe meaning of specific bits therein. Block 732 represents the processof determining the mapping of the memory and registers of the barcodedecoding PC card in any appropriate fashion. The manner in which thedetermination of this mapping is done is not believed to be critical tothe invention. Finally, the preparatory work is finished in block 734 bydefining global data.

[0228] Block 736 represents the polling of the status line used toindicate whether the barcode card has data waiting to be read by thehost. In the preferred embodiment, this is the RTS status line. Theprocess represented by block 736 is repeatedly performed. Typically,this would be performed by implementing a DO loop with a wait statementthat is executed each time the test of block 736 indicates there is nodata ready, as symbolized by line 737. After the wait instruction, test736 is performed again. Once test 736 indicates that there is data readyfor delivery, as symbolized by line 739, processing branches to thefirst part of a handshake protocol implemented by block 738 where thehost CPU is informed that the barcode card has indicated that it hasdata ready for delivery to the host. Next, block 740 is performed whichrepresents waiting for and receiving an acknowledgment from the host CPUthat it is ready to receive the data from the barcode card.

[0229] Block 742 represents the process of retrieving the decodedalphanumeric character from the HP 2312 barcode decoder chip on thebarcode card. Since the 2312 needs to be configured, configuration datais occasionally sent from the host to the 2312 barcode decoding chip.This process also requires a handshake similar to the process used toretrieve decoded data from the 2310. The handshaking process isrepresented by block 744. Block 746 represents the process of writingany necessary control or configuration data to the barcode decoder chip.Block 748 represents the process of checking for errors that wouldrender the retrieved data unreliable or incorrect. Such errors weredescribed above. If an error condition is found, the host causes thebarcode card to flush all data from the current scan and wait forincoming data from the next scan, as symbolized by block 748. If noerrors were found, the retrieved character from the barcode card isdisplayed on the display of the host and deposited in the keyboardbuffer or other data storage device in or coupled to the host, all asrepresented by block 750.

[0230] Block 752 represents the process of determining if any charactershave been entered into the host from, for example, the keyboard of thehost that are to be written to the barcode decoder chip. If there issuch a character, it is written to the barcode card by the host andechoed on the display of the host in readable form. Block 754 representsthe process of checking to see if another character has been enteredinto the host from, for example, the keyboard which is to be sent to thebarcode card. If another character has been typed or is ready to besent, the character is written to the barcode card and echoed to thedisplay of the host in readable form. Block 756 represents the processof returning to “loop” at the top of the routine symbolized by block736.

[0231] Referring to FIG. 36, there is shown a block diagram of a broadconcept within the teachings of the invention. In this embodiment, ahost computer or PDA has a PCMCIA slot 502 with associated driversoftware described elsewhere herein. The host computer 500 also has abarcode client application that interfaces with the driver software forthe PCMCIA slot to write data to and read data from a PC card 504 whichplugs into the PCMCIA slot 502. The PC card 504 interfaces to aconventional barcode scan engine 762 or 764. The barcode scan engine maybe integrated on the card as symbolized by the box 760 outlined indashed lines, or the scan engine may be connected to the PC card by acable symbolized by dashed line 762. The barcode scan engine 762 or 764may be a laser based scan engine, a CCD or other imaging type device, awand or other types of barcode scan engines that may be developed in thefuture.

[0232] The barcode scan engine outputs an undecoded scan signal on line766 to a decoder 768. The purpose of the decoder is: to decode thebarcode scan signal into one or more alphanumeric characters, notify thehost computer 500 of the presence of one or more decoded characterswaiting for delivery to the host computer, and cooperate with the hostcomputer in getting one or more decoded characters into the memory,keyboard buffer or other storage device of the host computer via datatransfer across the PCMCIA slot. The decoder may be any known decodingcircuitry or microprocessor controlled by known decoding software andcoupled with interface circuitry 770 to interface with the PCMCIA busand PCMCIA driver software on the host computer 500. The interfacecircuitry can be commercially available PCMCIA interface adaptercircuit.

[0233] Referring to FIG. 37, there is shown a block diagram of a systemincluding a host computer which does decoding on-board the host and a PCcard which only passes digitized samples of the barcode pattern to thehost for decoding. FIG. 37 is intended to be an adjunct to the softwarearchitecture diagram of FIG. 5 showing a typical software architecturefor an embodiment where the decoding is done on the host and not on thePC card to show the relationships between the various routinescontrolling the host microprocessor 516 although not all the detailssuch as the keyboard, display, input device etc are shown. The hostcomputer 500 in this embodiment only receives sample data from the PCcard and not complete alphanumeric characters. The sample data comes inthrough the PCMCIA socket 502 (circuits or software routines with thesame reference numbers as circuits or software routines in previousdrawings have the same structure and function generally) and is passedvia bus 774 to a PCMCIA bus controller circuit 115 the functions todrive data onto and receive data from the PCMCIA bus 48. The barcodeimage data samples generated by the PC card 776 are read by the hostfrom a register or memory in the I/O space (or memory space in someembodiments) of the PC card and are transferred over the PCMCIA bus 48through the PCMCIA bus controller 115 into a block of memory 778 in thehost RAM 95 reserved to store the sample data. The sample data may bestored in RAM 95 directly by the PCMCIA bus controller circuit 115 viaDMA transactions, or it may be read by the microprocessor 516 and storedin RAM 95.

[0234] The manner in which the barcode image data is read from the PCcard can be similar to the process previously described with referenceto FIGS. 29A through 29C by which a driver routine or terminate and stayresident routine 780 in FIG. 37 determines the base address in the I/Ospace of the PC card register(s) from which data is to be read uponreceipt of an interrupt from the PC card and determines the interruptnumber. However, the process of FIGS. 29A through 29C was specificallydesigned for PC cards that also had nonvolatile memory on board whichwas in the memory space of the host and which the host had to accessthrough the PCMCIA bus. In the system of FIG. 37, the PC card does nothave any nonvolatile memory which must be accessible to the host, sosimpler known processes to access data from PC cards which are presentlycommercially available may also be used. If the method of FIGS. 29Athrough 29C is to be used, data path 782 represents the interrogation ofthe CS layer 784 by the barcode client application 786 through driver780 to get client information about the various clients of the CS layerto find out which client is the PC card and then to find out the baseaddress and interrupt number of the PC card. Data paths 788 and 790represent the interchange of calls and data passing between the CS layerand the MTD layer to implement this process.

[0235] The PC card will generate an interrupt when it has stored thereina predetermined number of samples that need to be stored in the hostRAM. The processing of this interrupt request is as described above withreference to block 658 in FIG. 29B. I/O transactions between the hostand PC card are carried out by the barcode client 786 using the driver780, Card Services 784, the memory technology driver layer 792, thesocket services layer 794 and the PCMCIA bus controller 115. Cardservices talks to the socket services layer via data path 796. Socketservices 794 controls the PCMCIA bus controller circuit 115 assymbolized by dashed line 795. All data paths between various softwarelayers or between software layers and hardware circuits are onlysymbolic and interprocess communication may by any known method such asinterrupt, interprocess pipeline, shared memory, control and datasignals etc. will suffice. The purpose of socket services is to mask thedetails of the particular PCMCIA bus controller 115 used so as topresent a uniform programmatic interface to the CS layer 784.

[0236] Once the barcode client application has processed theinterrupt(s) from the PC card and knows that there is sample data from acomplete barcode stored in the barcode image data buffer 778, thebarcode client application 786 invokes the barcode decode softwareroutine 798 via data path 796. The barcode decode software routine thenruns and accesses the barcode image data as symbolized by data path 780.The barcode decode routine then carries out processing identical orsimilar to that described in FIG. 6B. The details of the barcode decoderoutine are not critical to the invention and any known barcode decodingroutine may be substituted for routine 798. After the alphanumericcharacter or characters are decoded from the image data, thecharacter(s) are passed to the barcode client 786 for use or storage inthe keyboard buffer or other storage area of the host as symbolized byblock 782.

[0237] The PC card 776 in the system shown in FIG. 37 contains only asampling and PCMCIA interface adapter circuit 800 which is connected toan input port 802. The input port 802 is coupled to the undecodedbarcode scan engine 806 via bus 804. The scan engine can be tethered orintegrated onto the PC card.

[0238] Referring to FIG. 38, there is shown a block diagram of oneembodiment for the sampling and PCMCIA interface circuit 800. Acomparator receives the analog output signal from the scan enginephotodetector or other imaging technology on line 810 and compares thevoltage level to a fixed reference voltage on line 812. The output ofthe comparator 808 on line 814 changes states between logic 0 and logic1 each time the signal on line 810 exceeds or drops below the referencevoltage. The resulting output signal varies between logic 1 and logic 0in accordance with the light and dark patterns of the barcode. In someembodiments, the comparator 808 may be part of the undecoded barcodescan engine so the input port 802 will effectively be line 814.

[0239] The signal on line 814 is effectively sampled and shifted into ashift register 816 in synchronization with a clock signal on line 818.The shift register is typically a serial-in-parallel-out shift registerwhich has its parallel format data ports coupled to the data input of alatch 820. An activity detector 815 monitors for transitions on line 814and activates a signal line 817 when activity is detected. Activation ofthe signal on line 817 causes AND gate 819 to gate the clock signalthrough to line 818. A counter 822 counts the clock pulses on line 818,and when the number of clock pulses equals the number of storage cellsin the shift register, the counter count is decoded by a decoder 824which activates an IRQ interrupt signal line 826. In some embodiments, acounter that rolls over at a maximum count equal to the number of shiftregister cells and signals this fact can be substituted. Activation ofthe IRQ signal is used to reset the counter via line 828, to cause theshift register to parallel load its content onto bus 830 and to causelatch 820 to latch the data on bus 830. Latch 820 is located at a knownlocation in the shared I/O or memory space of the host and PC card.Activation of the IRQ interrupt causes the barcode client application786 to perform an I/O transaction with the PC card. As part of thistransaction, the address of the latch 820 will be sent across the PCMCIAbus to a decoder 832 via address lines 833. The decoder 832 decodes theaddress and activates the chip select and/or output enable signal online 834. This causes the latch 820 to place its data on the data lines835 for transfer to the host. This process is repeated until activityceases on line 814.

[0240] In an alternative embodiment shown in FIG. 39, all the complexityof the shift register, counter and decoder is eliminated and a simplepolling scheme is used. In this embodiment, the PC card 776 includesonly a comparator 808 and a decoder 840. The comparator 808 has anaddress in the shared I/O or memory space of the host and PC card whichis known to the barcode client. The barcode client 786 or driver 780includes a routine to periodically poll the comparator output and readits state to take samples of the barcode image. This is done by writingthe address of the comparator on address lines 833. This causes decoder840 to activate the ENABLE signal on line 842 which enables the outputof the comparator 808 so as to drive its current state onto data line814 which is coupled to the host through the PCMCIA bus. By repeatedlypolling the binary state on data line 814, a series of binary samples ofthe barcode image can be loaded into the host for decoding.

[0241] In the embodiments of FIGS. 38 and 39, the barcode image data isnot compressed and it is up to the barcode decoding software 798 tocalculate the ratios between the run lengths of logic 1 and logic 0'sand then decode the alphanumeric characters from the ratios of the runlengths. Referring to FIG. 40, there is shown another embodiment for thesampling and PCMCIA interface adapter circuit 800 in FIG. 37 which doessome of the work of compressing the barcode image data for the host. Inthis embodiment, the comparator 808 works as in the embodiments of FIGS.38 and 39 except that its output data line 814 is used as a strobesignal, and, in some embodiments, as the interrupt signal IRQ. The waythis embodiment works is to use the time of every transition on line 814as the data that is sent to the host so that host can calculate theratios of run lengths from the differences in times between transitions.To implement this scheme, a clock 850 having a frequency high enough togive the desired resolution, e.g., 100 kHz, drives the clock input of acounter 854 (typically a 15 bit counter). The counter has a paralleldata count output 856 which is driven with the count value each time astrobe pulse is received at an enable input 858. The STROBE signal online 814 is coupled to an edge sensitive trigger input on a monostablemultivibrator or “one shot” 862. Any circuit that can detect transitionson line 814 and generate a suitable strobe signal for counter 854, latch866 and flip flop 864 will suffice for purposes of practicing theinvention. Each time any transition occurs on line 814, “one shot” 862generates a pulse on line 854 which causes the current count of counter854 to be driven onto bus 856. The output pulse of the one shot on line854 is also connected to the set input of an SR flip flop 864 and thelatch or load input of a latch or FIFO 866. Thus, each time a transitionoccurs on line 814, flip flop 864 is set, and the count in counter 854is latched into latch or FIFO 866. The Q output of the flip flop 864 iscoupled to the IRQ interrupt pin of the PCMCIA bus and causes theinterrupt service routine dedicated to the PC card on the host to run.This interrupt service routine knows the address of the latch or FIFO866 in the shared I/O or memory space of the host and PC card and writesthat address onto address lines 868 on the PCMCIA bus. Decoder 870receives this address and activates an ENABLE signal on line 872 tocause latch or FIFO 866 to drive the data stored therein onto the datalines 874 of the PCMCIA bus for transfer to the barcode image buffer. Ifa FIFO is used, the next data on the stack in FIFO order that has notalready been read by the host is “popped” onto data lines 874. A FIFO ispreferred for storage device 866 because it is possible that more thanone transition on line 814 can occur before the interrupt serviceroutine executes and unloads the data on data lines 874. A FIFO stackcan store more than one count while waiting for the host interruptservice routine to execute.

[0242] When the decoder 870 activates the ENABLE signal, the flip flop864 is reset by virtue of the connection of line 872 to the reset inputof the flip flop thereby deactivating the interrupt request until thenext strobe pulse on line 854.

[0243] In some of the embodiments symbolized by FIGS. 38, 39 or 40, thecomparator will be part of the scan engine such that the scan engineputs out a “wand” type signal. A wand signal only has logic 1 or logic 0levels. It transitions between them in accordance with the light anddark patterns of the barcode. In such embodiments, if the scan engine isnot integral with the PC card, the circuitry on the PC card starts withthe output line 814 from the comparator in the scan engine.

[0244] Referring to FIG. 41, there is shown a block diagram of thepreferred embodiment for a PC card which decodes undecoded barcodesignals from either an on-board barcode scan engine or an externalbarcode scan engine and which has on-board nonvolatile flash EEPROM. Thecircuit of FIG. 41 uses a decoder MPU 900 of the class exemplified bythe Hewlett Packard HP 2312 or 2320 series and optionally includes twoon-board nonvolatile flash EEPROMs 902 and 904 which are accessible tothe host computer. The flash EEPROM is supported by two byte steeringcircuits 906 and 908. These byte steering circuits are each 8 bitbuffers and are present to satisfy the PCMCIA specification'srequirement that the flash memory high byte be readable on either thehigh byte 910 or low byte 912 of data lines on the PCMCIA busrepresented by box 914. If it were not for this particular requirementof the PCMCIA specification, these circuits could be eliminated. Thehigh byte of output data from the flash memory appears on bus 916 whichis coupled to the data inputs of both steering buffers. Thus, the highbyte of data from the flash memory 902 can be latched into either buffer906 and output on the high byte 910 (pins D15-D8) of the PCMCIA data busor can be latched into buffer 908 and output on the low byte 912 (pinsD7-D0) of the PCMCIA bus. This byte steering function is a function notsupported by the Zilog PCMCIA adapter chips such as chip 522 in FIG. 24and 536 in FIGS. 25 and 26 and anywhere else that a PCMCIA interfacecircuit for the PC card is called out using that chip. In some cases,that will be acceptable. However, the PCMCIA specification calls forthat function, so to be compatible with the specification and softwarewritten in compliance therewith, this function will have to be suppliedexternally to the Zilog chip.

[0245] Buffers 906 and 908 are bidirectional, so data can be writteninto the flash memory 902 through these two buffers or read from flashmemory 902 through these buffers. Data is written into or read from thelow byte flash memory 904 through the low byte 912 of the PCMCIA databus. Address information is supplied to the two flash memories 902 and904 via address bus 918.

[0246] Card Info ROM 920 stores the “card information structure” as thatterm is defined in the PC□MCIA specification. This is data that defineshow the card is organized.

[0247] Control register 922 stores two “pacing” signals that areinvolved in the handshaking protocol for I/O send and receivetransactions between the host computer and the PC card. These signalsare asserted based upon certain signals on line 924 generated by thedecoder MPU 900 and which are stored in a status register 926. Thehandshaking protocol is dependent upon the particular design of thedecoder MPU. However, for the HP 2312 series from Hewlett Packard, theprotocol involves the decoder MPU asserting specific one of the threesignals on bus 924 at specified times. The host reads the status ofthese signals in the status register 926 under control of the barcodeclient or interrupt service routine, and, in response, the host computer500 under control of the barcode client application or interrupt serviceroutine writes appropriate control signals to control register 922. Thehandshaking protocol is similar to the request to send and clear to sendprotocol for serial data transmission via RS232 connections. Further, aBoolean logic combination of the signals stored in the status register926 and the control register 922 is used to generate the interrupt tothe host indicating that a decoded alphanumeric character is ready fordelivery to the host. The details of this protocol and interruptgeneration will be made more clear later in connection with thediscussion of Control and Interrupt Logic 928. Control and InterruptLogic 928 coordinates interrupts and generates chip select signals tocontrol addressing of various of the registers in implementinginterrupts and I/O transactions between the host and the PC card.

[0248] A data register 929 stores the alphanumeric character decoded bythe decoder MPU 900. This character is written into the data register929 via a multiplexed data/address bus 930. Register 929 is mapped intothe I/O space of the PC card and its base address in the I/O space isdetermined by the barcode client in accordance with the processdescribed in FIGS. 29A-29C. Upon receiving an interrupt, the host undercontrol of the barcode client will use this base address to address dataregister 929 and get the decoded character.

[0249] A command register 932 stores ASCII commands from the barcodeclient application on the host that are used to control or modify theway the decoder MPU 900 performs the decoding operation. For example, bysending appropriate strings of ASCII bytes to the decoder MPU 900through command register 932, the decoder MPU can be controlled so as toadd user specified prefixes or suffixes to the data decoded fromparticular types of barcodes being scanned in aid of some formattingrequirements the user may have.

[0250] The decoder MPU stores data and/or program information it needsfor its operations in a local SRAM 934. Because the decoder 900 does nothave enough pins to write the necessary 11 bit address to the addressport of the SRAM, an address latch 936 is used to store the lower 8 bitsof the address. A separate 3 bit address bus 938 is used to deliver the3 most significant bits of the address from the decoder to the SRAMaddress port. To access the SRAM, decoder 900 first writes the lower 8bits of address on the multiplexed data/address bus 930 and these getlatched into the address latch 936 and applied to the SRAM address portvia bus 940. Then the decoder 900 puts the upper three bits of addresson bus 938 and places any data to be written to the SRAM or receives anydata from the SRAM on bus 930. There is a control line 942 that carriesa signal from the decoder 900 to the address latch 936 that tells thelatch 936 when to latch the address information on bus 930. In otherembodiments where a different decoder MPU is used that has sufficientpins for addressing and data, the address latch can be eliminated andpossibly separate address and data buses can be used.

[0251] A Configuration Option Register 948, a Card Status Register 950and a Pin Replace Register 952 are all registers required by the PCMCIAspecification to allow the Card Service software layer to talk to the PCcard. All three of these registers are mapped into the Attribute Spaceof the PC card. This memory space is zone 2 in FIG. 4 and is alsosometimes referred to as the Card Information Services space. Theseregisters are written using memory cycles. The Card Info ROM 920 is alsomapped into the Attribute Space. The flash memory chips 902 and 904 aremapped into the memory space, and all the other registers on the PC cardare mapped into the I/O space.

[0252] The Configuration Option Register 948 stores 6 bits ofconfiguration index data that controls how the PC card is set up. Theembodiment of FIG. 41 ignores all but the least significant bit of this6 bits of data. The least significant bit tells the PC card whether thehost computer wants the PC card to be in memory mode or I/O mode. All PCcards are required to start operations in memory mode according to thespecification, but I/O mode is more useful for the barcode decodingprocess. Because the PCMCIA bus pins have different meanings and signalnames assigned to them in memory mode versus I/O mode, the leastsignificant bit of the bits stored in the Configuration Option Register948 tell the circuitry on the PC card what pins on the PCMCIA bus arewhat signals at any particular time. When the barcode client wants toperform an I/O transaction with the PC card, it calls Card Services andinforms it of that fact. Card Services then writes 6 bits of data to theConfiguration Option Register 948 with a logic 1 in bit 0. When bit 0 isa logic 1, the Control and Interrupt Logic 928 interprets the signals onthe PCMCIA bus with their I/O mode meaning thereby causing the card tofunction in I/O mode.

[0253] The Card Status Register 950 stores data of which only two bitsare significant in this embodiment. Bit 1 of this register is used toenable the interrupt to the host. In other words, the host computer canmask interrupts by controlling the logic state of bit 1. If bit 1 is alogic 1, interrupts can be generated by the PC card, but if bit 1 is alogic 0, no interrupts to the host are allowed. The barcode client mayalso set bit 3 of the Card Status Register 950 if it desires to receivedigital audio from the PC card for gating to the host's speaker or otheraudio transducer for audible feedback to the user while barcodes arebeing scanned. The decoder MPU 900 generates a digital audio signal on aparticular pin when a successful decode has occurred. When bit 3 of theCard Status Register 950 is set and the PC card is in the I/O mode, thisdigital audio signal is made available on the PCMCIA bus for the host touse. In alternative embodiments, a headphone interface 901 is alsoprovided to receive this digital audio signal and convert it to theproper form for driving headphones plugged into the headphone interface.

[0254] The Pin Replace Register 952 stores the memory mode state ofcertain shared pins on the PCMCIA bus when the PC card is in I/O modeand those pins are used for different signals significant to I/O mode.The most important of these shared pins is the interrupt signal in I/Omode and the RDY/BSY status in memory mode. A pin on the PCMCIA buscarries this RDY/BSY status signal in memory mode, but the same pin isused for the interrupt signal in the I/O mode. To enable determinationof the RDY/BSY status of the card when operating in I/O mode, the statusof the RDY/BSY pin is written into the Pin Replace Register 952 for useduring the I/O mode.

[0255] The particular embodiment shown in FIG. 41 has the capability ofreceiving undecoded barcode signals from either an internal or externalbarcode scan engine. An integral barcode scan engine 964 which isintegrated on or otherwise physically integral with the PC card suppliesscan signals on line 966 to one input of the multiplexer 960, while anexternal barcode scan engine supplies undecoded barcode signals toanother input of the multiplexer 960 via line 968. The barcode clientcontrols which of these two signal lines 966 or 968 is coupled to thedecoder MPU 900 on signal line via a bit in Control Register 922. Thestatus of this bit is communicated to the switch control input of themultiplexer 960 via line 962.

[0256] Because some scan engines have LED's on them that are to belighted when a successful decode has occurred, an LED buffer amplifier972 is provided. This amplifier receives and LED feedback signal fromthe decoder 900 via line 974. The amplifier is necessary in the depictedembodiment, because the decoder MPU output signal is not strong enoughto drive a LED located several feet away from the MPU. The amplifier 972also buffers the MPU from any potentially damaging voltages that mightaccidently find their way onto line 976.

[0257] In an alternative species within the genus represented by FIG.41, a motion sensor 929 is integrated on the PC card and generates asignal which can be polled or generates and interrupt each time motionis sensed near the PC card. This signal is sent to the barcode clientapplication controlling execution by said host computer through thePCMCIA bus so that the barcode client application can send data to thedecoder 900 to cause the input device or barcode scan engine to startscanning. In another alternative embodiment, the signal from the motionsensor is sensed by the Control and Interrupt logic 928 which thengenerates a signal to cause the internal scan engine 964 or an externalscan engine or other input device to start operating. In someembodiments, this triggering action caused by motion will be gated by abit set in the control register by the barcode client application, i.e.,no scanning is started unless the barcode client application says it isready to receive data from an input device.

[0258] In another alternative species of the genus represented by FIG.41, a conventional hand operated trigger switch mounted on the PC cardor connected to the PC card by a cable can be used to control start ofscanning. Control of scanning start or start of operation of anotherinput device is by the same processes described above for the motionsensor 929.

[0259] Control of the circuitry on the PC card is provided by theControl and Interrupt Logic 928 in accordance with the Boolean logicrelationships given in Table 1 below. The below listed control andaddress signals from the PCMCIA bus and the below listed control signalsgenerated on the PC card are coupled to the Control and Interrupt Logic928 via data paths 980 and 982. The interrupt generated by the Controland Interrupt Logic 928 is sent to the host via data path 984 under theconditions defined below in Table 1. The chip select signals are notshown on FIG. 41 but are activated under the conditions defined below inTable 1. TABLE 1 Control and Interrupt Logic Description SECTION A TheControl and interrupt logic uses the following PCMCIA signals: A7through A0--used to address specific I/O and CIS registers −CE1 and−CE2--help determine PCMCIA transfer type −OE and −WE/−PGM--helpdetermine PCMCIA transfer type +RDY/−BSY--prevents access when applyingpower, and signals interupt when enabled +WP--used to signal whetherwrite protection is in effect −REG--help determine PCMCIA transfer typeBVD1 and BVD2-- is used for audio feedback when enabled −RESET--resetlogic −IORD and −IOWR--help determine PCMCIA transfer type−INPACK--acknowledge I/O input transfers SECTION B In addition, thefollowing signals are used: −FBSYI and −FBSYO--indicate that flashmemory is in use AUDIO--audio feedback from Decoder MPU EXTWP--externalwrite protect input, e.g. write-protect switch −FLASH 1 and−FLASHO--used to select flash memories −BWR--used to write data toCommand register −BOE--used to read data from Data register BRESET--usedto reset Decoder MPU SECTION C Address Decoding is as follows: Card infoROM= !−REG & !AO & !−OE & !−CE1 & !A7 (64 bytes using A6 to A1) HighFlash byte= (−REG & !−CE2) # (−REG &!−CE1 & −CE2 & AO) Low flash byte=−REG & !−CE1 & !(−-REG & !−CE1 & −CE2 & AO) Write PCMCIA registers=!−REG & !AO & !−WE & !−CE1 & A7 (3 bytes using A2 and A1) Read PCMCIAregisters= !−REG & !AO & !−OE & !−CE1 & A7 (3 bytes using A2 and A1)Control register= !−REG & !AO & IOMODE & !−IOWR & !−CE1 & !A1 Statusregister= !−REG & !AO & IOMODE & !−IORD & !−CE1 & ! A1 Command register=!−REG & !AO & IOMODE & !−IOWR & !−CE1 & A1 Data register= !−REG & !AO &IOMODE & !−IORD & !−CE1 & A1 SECTION D Interrupt logic is as follows: IfIOMODE is false: RDY=!(!−FBSY1#!−FBSYO) If IOMODE is true: RDY= (!−BRTS& !RTSMASK & !INTMASK) #(!=BCDY & !BCRD & !INTMASK) #(!=BDDY & !BCWR &!INTMASK)

[0260] Section A of Table 1 defines the address (A7-A0) and controlsignals on the PCMCIA bus 914 which are coupled to the Control andInterrupt Logic 928. The definitions of the various control signals isgiven more completely in the PCMCIA specifications incorporated byreference herein. The control signals in Section B of Table 1 are notPCMCIA signals but are signals generated by the circuitry on the PCMCIAcard that are also used by the Control and Interrupt logic to generateinterrupt and chip select signals at the appropriate times. The BooleanLogic equations in Section C of Table 1 define the logic in the Controland Interrupt logic 928 to activate the chip select inputs of thecircuit elements listed on the left side of Section C. In Section C, &represents the Boolean AND function, ! represents the Boolean NOTfunction and # represents the Boolean OR function. For example, when thecombination of signals listed on the first line of Section C results ina true result when their current logic states are combined in accordancewith the Boolean logic functions listed on the first line, the chipselect of the Card Info ROM is activated and the ROM can be read.

[0261] The Boolean equations of Section D represent the signals andBoolean logic functions which control when an interrupt to the host isgenerated by the PC card. The first line of Section D defines thecombination of signals that control the state of the RDY/BSY pin on thePCMCIA bus during memory mode when this pin indicates the ready foraccess or busy-no access state of the flash EEPROM. The second line ofSection D pertains to what combination of signals when combined usingthe Boolean functions given on that line in I/O mode which will resultin an interrupt being generated.

[0262] The Computer Program Listing Appendix included herein on compactdisc, hereby incorporated by reference, provides a C language sourcecode listing of an exemplary communication program for execution on thehost computer for communicating with the decoder MPU 900 in FIG. 41; anexemplary barcode assembly language support program for providing theruntime environment for the C code that is linked to the C code beforecompiling to make an executable program; an exemplary card serviceprogram or a Card Service client application which is useful fordebugging the PC card; and a program for programming a gate array logicchip so as to provide proper control for the decoder MPU 900 if the HP2210 type decoder chip is used.

[0263] Although the invention has been described in terms of thepreferred and alternative embodiments disclosed herein, those skilled inthe art will appreciate other alternative embodiments that do not departfrom the spirit and scope of the teachings of the invention. All suchembodiments are intended to be included within the scope of the claimsappended hereto.

What is claimed is:
 1. An interface circuit in the form factor of aPCMCIA defined PC card, said interface circuit for coupling between aninput device that can generate electrical signals encoding alphanumericcharacters and a host computer with a PCMCIA slot housing a PCMCIA busconnector, comprising: an input port for receiving said electricalsignals from said input device; a PCMCIA bus connector; a decodercircuit coupled to said input port so as to receive said electricalsignals, said decoder circuit for decoding said electrical signals togenerate one or more alphanumeric characters and for notifying said hostcomputer when at least one successful decoding operation has occurredand at least one alphanumeric character resulting from decodingoperations is available on said PC card for access by said hostcomputer; and an interface circuit coupled to said decoder circuit andto said PCMCIA bus connector on said PC card, for facilitating couplingof said decoder circuit to said host computer via said PCMCIA busconnectors such that said notification of a successful decodingoperation can be passed to said host computer via said PCMCIA busconnectors and so that said host computer can retrieve said one or moredecoded alphanumeric characters from said PC card via said busconnectors.
 2. The apparatus of claim 1 wherein said input device isphysically mounted on said PC card.
 3. The apparatus of claim 2 furthercomprising nonvolatile memory physically mounted on said PC card andcoupled to said host computer through said PCMCIA bus connector foraccess by said host computer and or said decoder circuit.
 4. Theapparatus of claim 3 wherein said decoder circuit is of the class ofcommercially available barcode decoding integrated circuits of which istypical the integrated circuit manufactured by Hewlett Packard andmarketed under the model designation HP 2312 as of the time of filing ofthis patent application.
 5. The apparatus of claim 4 wherein saidinterface circuit is of the class of commercially available PCMCIAinterface adapter integrated circuits of which is typical the integratedcircuit manufactured by Zilog under the model designation Z86017 as ofthe time of filing of this patent application.
 6. The apparatus of claim2 wherein said interface circuit is of the class of commerciallyavailable PCMCIA interface adapter integrated circuits of which istypical the integrated circuit manufactured by Zilog under the modeldesignation Z86017 as of the time of filing of this patent application,and wherein said input device is a barcode scan engine which isphysically mounted on said PC card.
 7. The apparatus of claim 1 whereinsaid PC card further comprises nonvolatile memory coupled for access bysaid host computer through said PCMCIA bus connector.
 8. An interfacecircuit in the form factor of a PCMCIA defined PC card, said interfacecircuit for coupling between an input device that can generateelectrical signals encoding alphanumeric characters and a host computerwith a PCMCIA slot housing a PCMCIA bus connector, comprising:nonvolatile memory for access by said host computer; an input interfacecircuit for receiving electrical signals from said input device inwhatever form they are sent and converting them to a useable form; aPCMCIA bus connector; a decoder circuit coupled to said input interfacecircuit so as to receive said electrical signals after conversion to aform useable by said decoder circuit, said decoder circuit for decodingsaid electrical signals to generate one or more alphanumeric charactersencoded in said electrical signals and for notifying said host computerwhen at least one successful decoding operation has occurred and atleast one alphanumeric character resulting from decoding operations isavailable on said PC card for access by said host computer; and aninterface circuit coupled to said decoder circuit and to said PCMCIA busconnector on said PC card, for facilitating coupling of said decodercircuit to said host computer via said PCMCIA bus connectors such thatsaid notification of a successful decoding operation can be passed tosaid host computer via said PCMCIA bus connectors in the form of aninterrupt and so that said host computer can retrieve said one or moredecoded alphanumeric characters from said PC card via said PCMCIA busconnectors.
 9. The apparatus of claim 8 wherein said decoder circuit isof the class of commercially available barcode decoding integratedcircuits of which is typical the integrated circuit manufactured byHewlett Packard and marketed under the model designation HP 2312 as ofthe time of filing of this patent application
 10. The apparatus of claim8 wherein said PC card has an I/O mode and a memory mode, and whereinsaid PCMCIA bus connector has data bus pins comprising high byte datapins and low byte data pins, address pins and a plurality of pinscarrying a first plurality of control signals in I/O mode and a secondplurality of signals in memory mode, at least one of said controlsignals being an interrupt, and wherein said nonvolatile memory iscomprised of a high byte flash memory for storing the high byte of everystored word and a low byte flash memory for storing the low byte ofinformation of every stored word, and wherein each of said high byte andlow byte flash memories has an address port coupled to said address pinsof said PCMCIA bus connector and has a data port, said interface circuitcomprising: a bidirectional high byte steering buffer having a firstdata port coupled to the high byte data pins of said PCMCIA data bus,and having a second data port coupled to said data port of said highbyte flash memory, and having a chip select input; a bidirectional lowbyte steering buffer having a first data port coupled to the low bytedata pins of said PCMCIA data bus, and having a second data port coupledto said data port of said high byte flash memory, and having a chipselect input; a card information nonvolatile memory for storing datacomprising the Card Information Structure, and having a data portcoupled to said low byte data pins of said PCMCIA bus, and having a chipselect input; a configuration option register for storing data sent bythe host computer controlling whether said PC card is in memory mode orI/O mode, and having a data port coupled to said low byte data pins ofsaid PCMCIA bus, and having a chip select input; a card status registerfor storing data sent by the host computer which controls whetherinterrupts can be generated and controlling whether the PC card sends anaudio feedback signal generated by said decoder to said host computer,and having a data port coupled to said low byte data pins of said PCMCIAbus, and having a chip select input; a pin replace register for storingthe states of predetermined control signals in memory mode which arecarried on shared pins of the PCMCIA bus that are used for other controlsignals in I/O mode, and having a data port coupled to said low bytedata pins of said PCMCIA bus, and having a chip select input; a controlregister for storing pacing signals involved in the handshaking protocolfor data transfers between said PC card and said host computer, andhaving a data port coupled to said low byte data pins of said PCMCIAbus, and coupled to said decoder such that said decoder can read saidpacing signals, and having a chip select input; a status registercoupled to said decoder for storing predetermined pacing signalsgenerated by said decoder and involved in said handshaking protocol fordata transfers between said PC card and said host computer, and having adata port coupled to said low byte data pins of said PCMCIA bus, andhaving a chip select input; a command register coupled to said decoderby a multiplexed data/address bus, and having a data port coupled tosaid low byte data pins of said PCMCIA bus, and having a chip selectinput, for storing ASCII character strings sent by said host computer tosaid PC card to control operations by said decoder; a data registercoupled to said decoder by a multiplexed data/address bus, and having adata port coupled to said low byte data pins of said PCMCIA bus, andhaving a chip select input, for storing alphanumeric characters decodedby said decoder temporarily until said alphanumeric character is sent tosaid host computer; a static random access memory having an address porthaving a plurality of pins some of which are coupled to address outputpins of said decoder, and having a data port coupled to said decoder viasaid multiplexed data/address bus; an address latch coupled to saiddecoder by a multiplexed data/address bus, for storing address data sentby said decoder, and having an address output port coupled to theaddress pins of said address port of said static random access memorywhich are not coupled to said decoder; a control and interrupt logiccircuit coupled to said interrupt control signal pin of said PCMCIA busconnector on said PC card, and coupled to said chip select inputs ofsaid card info nonvolatile memory, said high byte flash memory, said lowbyte flash memory, said configuration option register, said card statusregister, said pin replace register, said control register, said statusregister, said command register and said data register, and coupled toreceive predetermined control and address signals from said PCMCIA buspins on the PCMCIA bus connector and to receive predetermined controlsignals generated on said PC card, for activating predetermined chipselect signals based upon predetermined combinations of logic states ofsaid control and address signals, and for activating said interruptsignal to said host computer based upon predetermined combinations oflogic states of said control and address signals.
 11. The apparatus ofclaim 9 further comprising a headphone interface circuit coupled to saiddecoder circuit for driving headphones using a digital audio signalgenerated by said decoder circuit.
 12. The apparatus of claim 9 furthercomprising a motion sensor coupled to said interface circuit forgenerating a signal which indicates when motion is sensed in front ofsaid motion sensor, and wherein said interface circuit includescircuitry for coupling said motion sensor circuit to a barcode clientapplication controlling execution by said host computer such that saidbarcode client application can send a signal to said decoder circuit tocause said input device to start operating.
 13. The apparatus of claim 9further comprising a conventional trigger switch coupled to saidinterface circuit for generating a signal which indicates when operationby said input device is desired, and wherein said interface circuitincludes circuitry for coupling said motion sensor circuit to a barcodeclient application controlling execution by said host computer such thatsaid barcode client application can send a signal to said decodercircuit to cause said input device to start operating.
 14. The apparatusof claim 9 further comprising a motion sensor coupled to said interfacecircuit for generating a signal which indicates when motion is sensed infront of said motion sensor, and wherein said interface circuit includescircuitry for coupling said signal output by said motion sensor circuitto said decoder circuit to cause said decoder circuit to generate asignal to cause said input device to start operating.
 15. The apparatusof claim 9 further comprising a conventional hand operated triggerswitch coupled to said interface circuit for generating a signal whichindicates when operation by said input device is desired, and whereinsaid interface circuit includes circuitry for coupling said signaloutput by said motion sensor circuit to said decoder circuit to causesaid decoder circuit to generate a signal to cause said input device tostart operating.
 16. An interface circuit in the form factor of a PCMCIAdefined PC card, said interface circuit for coupling between an inputdevice that can generate electrical signals encoding the spatialpatterns of contrasting areas of an image or representing some othertype of code which encodes alphanumeric information and a host computerwith a PCMCIA slot housing a PCMCIA bus connector, comprising: an inputport for receiving electrical signals from said input device; a PCMCIAbus connector; decoder means coupled to said input port so as to receivesaid electrical signals, for decoding said electrical signals togenerate one or more alphanumeric characters encoded in said electricalsignals and for notifying said host computer when at least onesuccessful decoding operation has occurred and at least one alphanumericcharacter resulting from decoding operations is available on said PCcard for access by said host computer; and PCMCIA interface meanscoupled to said decoder circuit and to said PCMCIA bus connector on saidPC card, for coupling said decoder circuit to said host computer viasaid PCMCIA bus connectors such that said notification of a successfuldecoding operation can be passed to said host computer via said PCMCIAbus connectors and so that said host computer can retrieve said one ormore decoded alphanumeric characters from said PC card via said PCMCIAbus connectors.
 17. The apparatus of claim 16 wherein said input deviceis a barcode scan engine and further comprising said barcode scan enginephysically attached to said PC card and coupled to supply to said inputport electrical signals encoding the contrasting patterns of a barcodetherein.
 18. The apparatus of claim 17 further comprising nonvolatilememory on said PC card for access by said host computer, and whereinsaid PC card can operate in I/O mode or memory mode and wherein saidPCMCIA interface means includes means for providing access by said hostcomputer both to said alphanumeric characters generated by said decodermeans and data stored in said nonvolatile memory, access to saidalphanumeric characters generated by said decoder being via I/O modetransactions and access to data stored in said nonvolatile memory viamemory mode transactions.
 19. The apparatus of claim 16 wherein said PCcard includes one or more registers for storing control data generatedby said host computer and transmitted to said PC card and control datagenerated by said PC card and for storing alphanumeric charactersgenerated by said decoder means, said one or more registers mapped intothe attribute space and I/O space of said PC card's memory mapping, andwherein said PCMCIA interface means includes means controllingoperations by said host computer to determine the base address in saidPC card's memory mapping where one or more of said registers on said PCcard can be found each time the PC card form factor interface to abarcode scan engine is inserted into the PCMCIA slot of the hostcomputer, and wherein said PCMCIA interface means includes means forgenerating an interrupt signal to said host computer when at least onesuccessful decoding operation has occurred and at least one alphanumericcharacter is waiting to be read by said host computer, and wherein saidPCMCIA interface means includes means controlling execution by said hostcomputer to determine the interrupt number assigned by the host computerto the interrupt from the PC card form factor interface to a barcodescan engine is inserted into the PCMCIA slot of the host computer. 20.An interface circuit in the form factor of a PCMCIA defined PC card,said interface circuit for coupling between a barcode scan engine thatcan generate electrical signals encoding the spatial patterns ofcontrasting areas of a barcode and a host computer with a PCMCIA slothousing a PCMCIA bus connector, comprising: a nonvolatile memory on saidPC card for access by said host computer, and wherein said PC card canoperate in I/O mode or memory mode; a barcode scan engine physicallyattached to said PC card and coupled to supply to said input portelectrical signals encoding the contrasting patterns of a barcodetherein; an input port for receiving electrical signals from saidbarcode scan engine resulting from scanning of a barcode; a PCMCIA busconnector; decoder means coupled to said input port so as to receivesaid electrical signals, for decoding said electrical signals togenerate one or more alphanumeric characters encoded in the spatialpatterns of said barcode and for notifying said host computer when atleast one successful decoding operation has occurred and at least onealphanumeric character resulting from decoding operations is availableon said PC card for access by said host computer; and PCMCIA interfacemeans coupled to said decoder circuit and to said PCMCIA bus connectoron said PC card, for coupling said decoder circuit to said host computervia said PCMCIA bus connectors such that said notification of asuccessful decoding operation can be passed to said host computer viasaid PCMCIA bus connectors and so that said host computer can retrievesaid one or more decoded alphanumeric characters from said PC card viasaid PCMCIA bus connectors, and wherein said, PCMCIA interface meansincludes means for providing access by said host computer both to saidalphanumeric characters generated by said decoder means and data storedin said nonvolatile memory, access to said alphanumeric charactersgenerated by said decoder being via I/O mode transactions and access todata stored in said nonvolatile memory via memory mode transactions. 21.The apparatus of claim 20 wherein said PC card includes one or moreregisters for storing control data generated by said host computer andtransmitted to said PC card and control data generated by said PC cardand for storing alphanumeric characters generated by said decoder means,said one or more registers mapped into the attribute space and I/O spaceof said PC card's memory mapping, and wherein said PCMCIA interfacemeans includes means controlling operations by said host computer todetermine the base address in said PC card's memory mapping where one ormore of said registers on said PC card can be found each time the PCcard form factor interface to a barcode scan engine is inserted into thePCMCIA slot of the host computer, and wherein said PCMCIA interfacemeans includes means for generating an interrupt signal to said hostcomputer when at least one successful decoding operation has occurredand at least one alphanumeric character is waiting to be read by saidhost computer, and wherein said PCMCIA interface means includes meanscontrolling execution by said host computer to determine the interruptnumber assigned by the host computer to the interrupt from the PC cardform factor interface to a barcode scan engine is inserted into thePCMCIA slot of the host computer.
 22. An interface circuit in the formfactor of a PCMCIA defined PC card, said interface circuit for couplingbetween an input device that can generate electrical signals encodingalphanumeric characters and a host computer having a PCMCIA slot housinga PCMCIA bus connector, comprising: an input port for receivingelectrical signals from said input device that can generate electricalsignals encoding the spatial patterns of said image; a PCMCIA busconnector for coupling to said PCMCIA bus connector of said hostcomputer; a PCMCIA interface adapter circuit coupled to receive saidelectrical signal from said input port, for converting said electricalsignals into a plurality of digital sample values representing theamplitude of said electrical signals at various times and for couplingsaid sample values to said host computer through said PCMCIA busconnectors, said digital sample values for decoding into alphanumericcharacters by said host computer.
 23. The apparatus of claim 22 furthercomprising auxiliary nonvolatile memory on said PC card which said hostcomputer can access to read data or write data via said PCMCIA busconnectors.
 24. The apparatus of claim 22 further comprising decodemeans within said host computer for controlling said microprocessor toconvert said digital samples into the alphanumeric characters encodedwithin the spatial patterns of said barcode.
 25. The apparatus of claim23 further comprising decode means within said host computer forcontrolling said microprocessor to convert said digital samples into thealphanumeric characters encoded within the spatial patterns of saidbarcode.
 26. A process for decoding on a PC card alphanumeric charactersfrom electrical signals generated by an input device encodingalphanumeric characters which are received by said PC card, comprising:receiving a signal that operation by said input device is desired;sending a signal to said input device to cause operation of said inputdevice to start generation of said electrical signals; and decoding saidelectrical signals into alphanumeric characters on said PC card.
 27. Theprocess of claim 26 further comprising generating an interrupt to a hostcomputer each time a successful decoding operation has occurred, andcontrolling said host computer to retrieve said alphanumeric characterfrom said PC card in response to said interrupt.
 28. The process ofclaim 27 wherein said input device is a barcode scan engine, and whereinsaid step of receiving a signal that operation by said input device isdesired comprises the step of receiving a signal from either a motionsensor or a manual switch, and wherein said step of sending a signal tosaid input device comprises sending a signal to said barcode scan engineto cause scanning to start.
 29. The process of claim 28 wherein saiddecoding step comprises: forming a binary image of the contrasting areasof the barcode image to be decoded; calculating the ratios of runlengths of logic 1's to logic 0's; analyzing the ratios of run lengthsto find start and stop characters; analyzing said start and stopcharacters to determine in which direction said barcode was scanned andwhat type of barcode was scanned; decode the alphanumeric charactersencoded in the ratios of run lengths; determine if the decoding wassuccessful; and generate a signal indicating decoding was successful.30. The process of claim 29 wherein the step of determining if thedecoding was successful includes the step of checking a checksum resultcalculated from the decoded result against a checksum encoded in saidbarcode, wherein said step of generating a signal indicating decodingwas successful includes the steps of sending the signal to said hostcomputer for generation of an audible or visible indication of asuccessful decoding.
 31. The process of claim 29 further comprising thesteps of filtering out any unwanted parts of the decoded result and/oradding any desired prefix or suffix to the decoded result.
 32. Theprocess of claim 26 further comprising the step of holding saidalphanumeric character in a memory on said PC card until said memory isread as part of a polling operation by said host computer.
 33. Theprocess of claim 26 further comprising the step of continuing to decodealphanumeric characters from electrical signals generated by said inputdevice until no more activity by said electrical signals is occurring,and then generating an interrupt to said host computer, and controllingsaid host computer to retrieve all said alphanumeric characters storedon said PC card in response to said interrupt.
 34. The process of claim33 further comprising the step of holding said alphanumeric character ina memory on said PC card until said memory is read as part of a pollingoperation by said host computer.
 35. A process for controlling a hostcomputer to determine the base address for one or more registers mappedinto the I/O space of a PCMCIA PC card and for determining the interruptnumber of said PC card, comprising the steps of: controlling said hostcomputer with card services, memory technology driver and socketservices software routines so as to provide to barcode clientapplications with an interface for performing transactions with said PCcard; controlling said host computer to execute a barcode clientapplication and register said barcode client application with a cardservices software layer as a client; controlling said host computerusing said card services software routine to assign an interrupt numberto a PC card when a new PC card is inserted into a PCMCIA slot of saidhost computer, and to assign a base address in the I/O space of said PCcard to one or more registers or memories on said PC card; controllingsaid host computer using said memory technology driver software routineto retrieve from the card services layer and store the interrupt numberand base address of the PC card assigned by said card services layer;controlling said host computer using said barcode client application tointerrogate said card services layer to obtain data regarding the firstregistered client in a list of clients registered with said cardservices routine and controlling said host computer using said barcodeclient application to pass to said card services routine a get clientinformation command having a predetermined argument; controlling saidhost computer using said card services routine to pass said get clientinformation command and said predetermined argument to said firstregistered client; controlling said host computer using said memorytechnology driver routine if said PC card is the first registered clientso as to respond to the get client information command by generating amessage having unique identification data at a first predeterminedoffset from the beginning of said message and having the interruptnumber and the base address of the PC card at a second predeterminedoffset from the start of the message and to send said message to saidcard services routine; controlling said host computer using said cardservices routine to receive a message returned from said firstregistered client in response to said get client information call andpass the returned message to said barcode client routine; controllingsaid host computer using said barcode client software routine to examinethe returned message from the first registered client to determine ifthe message contains unique signature data indicating said firstregister client is said PC card; if the first registered client is notsaid PC card, repeating the above described process of interrogating thecard services layer to determine the next registered client on the listof registered clients and sending a get client information command withsaid predetermined argument to said next registered client and examiningthe returned message to determine if the next registered client is thePC card and repeating this process of all registered clients until thePC card client is found; after the PC card client is found, reading saidinterrupt and said base address from said second predetermined offsetlocation in said message returned from said memory technology driverroutine; controlling said computer using said barcode client applicationto pass the interrupt number to an operating system of said hostcomputer for storage in an interrupt vector table; when an interrupt isreceived from said PC card, controlling said computer using said barcodeclient application and using said base address to control addressing inan I/O transaction carried out by said barcode client application withsaid PC card to retrieve data from said PC card.